Abstract: A method for self testing a multiband voltage controlled oscillator (VCO) is described. A first frequency band in a VCO is selected. An N value is selected for a frequency divider that produces a tuning voltage for the VCO that is between a low tuning voltage limit and a high tuning voltage limit for the VCO. The N value is adjusted in one direction until the tuning voltage reaches one of the tuning voltage limits. This N value at the tuning voltage is a first limit value. The frequency bands are switched from the first frequency band to a second frequency band that is adjacent to the first frequency band.

Abstract: Methods and apparatus for a switchable balun for combined Bluetooth and WLAN operation. A switchable balun is provided that includes an input circuit for receiving an amplified signal, the input circuit comprising first and second coils connected at a center tap, an output circuit comprising a third coil that is inductively coupled to the first and second coils, the output circuit for outputting an adjusted version of the amplified signal for transmission in a selected transmission mode, and a switch coupled to the center tap, wherein the switch is configured to couple a first voltage to the center tap to select operation in a first transmission mode and to couple a second voltage to the center tap to select operation in a second transmission mode.

Abstract: A system and method for detecting and correcting over-current and/or over-voltage conditions in power amplifier circuitry in a transmit chain of a mobile terminal are provided. In general, over-current detection and correction circuitry combines a current detection signal indicative of a current provided to or drained by the power amplifier circuitry during ramp-up for a transmit burst and a substantially inverse current ramping profile to provide a first constant value. The first constant value is compared to a current threshold or limit value to determine whether an over-current condition exists. If an over-current condition exists, the over-current detection and correction circuitry operates to reduce the output power of the power amplifier circuitry during ramp-up for the transmit burst to correct for the over-current condition. In a similar manner, over-voltage detection circuitry operates to detect and correct over-voltage conditions during ramp-up for the transmit burst.

Abstract: A method for self testing a multiband voltage controlled oscillator (VCO) is described. A first frequency band in a VCO is selected. An N value is selected for a frequency divider that produces a tuning voltage for the VCO that is between a low tuning voltage limit and a high tuning voltage limit for the VCO. The N value is adjusted in one direction until the tuning voltage reaches one of the tuning voltage limits. This N value at the tuning voltage is a first limit value. The frequency bands are switched from the first frequency band to a second frequency band that is adjacent to the first frequency band.

Abstract: A system and method for detecting and correcting excess current in a power amplifier in a transmit chain of a mobile terminal are provided. Over current detection and correction circuitry compares a current detection signal indicative of an output current of the power amplifier to a maximum current ramp during ramp-up for a transmit burst. If the current detection signal exceeds the maximum current ramp, then a power control signal controlling a supply voltage provided to the power amplifier circuitry is reduced, thereby reducing the output power and output current. Over voltage detection and correction circuitry compares a voltage detection signal indicative of an output voltage of the power amplifier to a maximum voltage ramp during ramp-up for the transmit burst. If the voltage detection signal exceeds the maximum voltage ramp, then the power control signal is reduced.

Abstract: Systems and methodologies are described that facilitate calibration of the loop bandwidth of a phase-locked loop (PLL). Calibration for the loop bandwidth of a PLL as described herein can be performed by optimizing the loop response of the PLL. Optimization of the loop response of the PLL can be achieved by modifying the value of a feedback counter of the PLL to induce a loop response at the PLL. The loop response of the PLL can be measured and compared to an ideal loop response. Based on this comparison, appropriate adjustments can be made to the PLL. Further, various techniques described herein facilitate calibration of a PLL by adjusting only parameters of a charge pump of the PLL without requiring individual control mechanisms for each element of the PLL, thereby improving PLL performance and manufacturing yield.

Abstract: A system is provided for correcting an output power of a power amplifier in a transmit chain of a mobile terminal. In one embodiment, the system includes output power correction circuitry that corrects the output power of the power amplifier during ramp-up for a transmit burst. The output power of the power amplifier is controlled based on a power control signal, which is provided by combining an amplitude component of a modulated signal and a corrected ramping signal provided by the output power correction circuitry. In general, a power amplifier ramp generator provides a ramping signal. The ramping signal is converted to a desired output power signal, which is subtracted from a detected output power signal to provide an error signal. The error signal is integrated to provide an adjustment signal, which is combined with an ideal ramping signal to provide the corrected ramping signal.

Abstract: A current-mode direct conversion RF receiver is presented. In one set of embodiments the RF receiver comprises a simple transconductor input stage to create a current-mode modulated signal from a voltage-mode modulated signal. A downconversion mixer may be coupled to the transconductor input stage via a low impedance current cascode stage, and may operate to create a set of current-mode quadrature baseband signals from the current-mode modulated signal. The downconversion mixer may be implemented with a transistor-switching network, which may be driven by a phase locked loop (PLL) with quadrature outputs. The set of current-mode quadrature baseband signals may be converted back to the voltage domain by a transimpedance filter, which may perform channel selection for the receiver. The transimpedance filter may additionally include a low frequency zero to remove DC offsets.

Abstract: A radio transmitter system designed using an FSK modulator with IQ up-mixers and sinewave coded digital-to-analog converters (DACs). The radio transmitter system may include a frequency shift keying (FSK) coding logic circuit coupled to the inputs of an IQ modulation and image reject up-mixer through a respective DAC and a respective low pass filter (LPF) for each the I and the Q channels. The FSK modulation scheme may employ sine and cosine signals for the I and Q channels, respectively, where the sine and cosine waves are directly coded into the DACs. The coded levels required by the DACs may be generated using current sources and may be Gray-coded. The output of the IQ modulation and image reject up-mixer may be connected to a power amplifier, which may be used to transmit the modulated RF signal via a loop antenna.

Abstract: A temperature to digital converter device is implemented by integrating a temperature sensor circuit into an analog-to-digital converter (ADC). Temperature-to-digital conversion is accomplished by first measuring a change in voltage (?VBE) across the junction of a diode when different current densities are forced through the junction. The thus obtained ?VBE is proportional to temperature. As part of the conversion processing, ?VBE is multiplied by a fixed gain, and an offset voltage value is subtracted from ?VBE. The multiplication and subtraction functions are performed by a switched-capacitor integrator in a delta-sigma ADC and the ADC itself operates as the temperature-to-digital converter device, eliminating the extra amplifier and/or capacitors required when the multiplication and/or subtraction function are performed outside the ADC. Alternately, other ADC topologies that include an integrator or gain amplifier, such as pipeline ADCs and cyclic ADCs may be used in place of the delta-sigma ADC.

Abstract: An integrated circuit (100, 200, 300) includes a voltage-mode driver circuit having an analog on-chip termination and also having a substantially constant output impedance across an operating range of an output voltage of the voltage-mode driver circuit. The voltage-mode driver circuit also maintains a substantially constant output impedance through voltage transitions to minimize voltage reflections while driving cabling.

Abstract: An integrated circuit (100, 200, 300) includes a voltage-mode driver circuit having an analog on-chip termination and also having a substantially constant output impedance across an operating range of an output voltage of the voltage-mode driver circuit. The voltage-mode driver circuit also has slew rate control of the output voltage.