Patents by Inventor Tsai Tsung Tsai

Tsai Tsung Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153896
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11901319
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20230378153
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 23, 2023
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 11776945
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: October 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20210242150
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 5, 2021
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11075131
    Abstract: A semiconductor package including a semiconductor die, a molding compound and a redistribution structure is provided. The molding compound laterally wraps around the semiconductor die, wherein the molding compound includes a base material and a first filler particle and a second filler particle embedded in the base material. The first filler particle has a first recess located in a top surface of the first filler particle, and the second filler particle has at least one hollow void therein. The redistribution structure is disposed on the semiconductor die and the molding compound, wherein the redistribution structure has a polymer dielectric layer. The polymer dielectric layer includes a body portion and a first protruding portion protruding from the body portion, wherein the body portion is in contact with the base material and the top surface of the first filler particle, and the first protruding portion fits with the first recess of the first filler particle.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: July 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Ching-Hua Hsieh, Chih-Wei Lin, Tsai-Tsung Tsai, Sheng-Chieh Yang, Chia-Min Lin
  • Patent number: 11056474
    Abstract: According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Tsai-Tsung Tsai, Wei-Hung Lin, Ming-Da Cheng
  • Patent number: 10985122
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20210057298
    Abstract: A semiconductor package including a semiconductor die, a molding compound and a redistribution structure is provided. The molding compound laterally wraps around the semiconductor die, wherein the molding compound includes a base material and a first filler particle and a second filler particle embedded in the base material. The first filler particle has a first recess located in a top surface of the first filler particle, and the second filler particle has at least one hollow void therein. The redistribution structure is disposed on the semiconductor die and the molding compound, wherein the redistribution structure has a polymer dielectric layer. The polymer dielectric layer includes a body portion and a first protruding portion protruding from the body portion, wherein the body portion is in contact with the base material and the top surface of the first filler particle, and the first protruding portion fits with the first recess of the first filler particle.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Da Tsai, Ching-Hua Hsieh, Chih-Wei Lin, Tsai-Tsung Tsai, Sheng-Chieh Yang, Chia-Min Lin
  • Publication number: 20200144206
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Application
    Filed: December 16, 2019
    Publication date: May 7, 2020
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20200020677
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Application
    Filed: September 24, 2019
    Publication date: January 16, 2020
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20200020634
    Abstract: A package and a method of manufacturing the same are provided. The package includes a first die, a second die, a third die, an encapsulant, and a redistribution layer (RDL) structure. The first die and the second die are disposed side by side. The third die is disposed on the first die and the second die to electrically connect the first die and the second die. The encapsulant laterally encapsulates the first die, the second die, and the third die and fills in a gap between the first die, the second die, and the third die. The RDL structure is disposed on the third die and the encapsulant.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 16, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsai-Tsung Tsai, Ching-Hua Hsieh, Chih-Wei Lin, Sheng-Hsiang Chiu, Yi-Da Tsai
  • Patent number: 10510697
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 10490539
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20190088635
    Abstract: According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 21, 2019
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Tsai-Tsung Tsai, Wei-Hung Lin, Ming-Da Cheng
  • Patent number: 10147693
    Abstract: An apparatus includes a spool configured to supply a wire, a cutting device configured to form a notch in the wire, and a capillary configured to bond the wire and to form a stud bump. The apparatus is further configured to pull the wire to break at the notch, with a tail region attached to the stud bump.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: December 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Yeong-Jyh Lin, Yi-Li Hsiao, Ming-Da Cheng, Tsai-Tsung Tsai, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu
  • Patent number: 10134717
    Abstract: According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: November 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Tsai-Tsung Tsai, Wei-Hung Lin, Ming-Da Cheng
  • Publication number: 20180331055
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Application
    Filed: July 23, 2018
    Publication date: November 15, 2018
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 10032734
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: July 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20170092634
    Abstract: According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.
    Type: Application
    Filed: December 9, 2016
    Publication date: March 30, 2017
    Inventors: CHEN-HUA YU, CHUNG-SHI LIU, CHIH-FAN HUANG, TSAI-TSUNG TSAI, WEI-HUNG LIN, MING-DA CHENG