Patents by Inventor Tse-Chuan Su
Tse-Chuan Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9219170Abstract: A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.Type: GrantFiled: October 29, 2014Date of Patent: December 22, 2015Assignee: PFC DEVICE HOLDINGS LTDInventors: Kou-Liang Chao, Mei-Ling Chen, Tse-Chuan Su, Hung-Hsin Kuo
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Publication number: 20150054115Abstract: A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.Type: ApplicationFiled: October 29, 2014Publication date: February 26, 2015Inventors: Kou-Liang CHAO, Mei-Ling CHEN, Tse-Chuan SU, Hung-Hsin KUO
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Patent number: 8927401Abstract: A trench Schottky diode and its manufacturing method are provided. The trench Schottky diode includes a semiconductor substrate having therein a plurality of trenches, a gate oxide layer, a polysilicon structure, a guard ring and an electrode. At first, the trenches are formed in the semiconductor substrate by an etching step. Then, the gate oxide layer and the polysilicon structure are formed in the trenches and protrude above a surface of the semiconductor substrate. The guard ring is formed to cover a portion of the resultant structure. At last, the electrode is formed above the guard ring and the other portion not covered by the guard ring. The protruding gate oxide layer and the protruding polysilicon structure can avoid cracks occurring in the trench structure.Type: GrantFiled: January 7, 2013Date of Patent: January 6, 2015Assignee: PFC Device Corp.Inventors: Kou-Liang Chao, Hung-Hsin Kuo, Tse-Chuan Su, Mei-Ling Chen
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Patent number: 8921949Abstract: A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal diffusion layer, a channel region, and a metal sputtering layer. For manufacturing the MOS P-N junction diode, a mask layer is formed on a semiconductor substrate. A gate oxide layer is formed on the semiconductor substrate, and a polysilicon structure is formed on the gate oxide layer. A guard ring, a central conductive layer and a channel region are formed in the semiconductor substrate. A silicon nitride layer is formed on the central conductive layer. A metal diffusion layer is formed within the guard ring and the central conductive layer. Afterwards, a metal sputtering layer is formed, and the mask layer is partially exposed.Type: GrantFiled: December 26, 2012Date of Patent: December 30, 2014Assignee: PFC Device Corp.Inventors: Kou-Liang Chao, Hung-Hsin Kuo, Tse-Chuan Su, Mei-Ling Chen
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Patent number: 8890279Abstract: A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.Type: GrantFiled: November 15, 2013Date of Patent: November 18, 2014Assignee: PFC Device Corp.Inventors: Kou-Liang Chao, Mei-Ling Chen, Tse-Chuan Su, Hung-Hsin Kuo
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Patent number: 8796808Abstract: A MOS P-N junction Schottky diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. An ohmic contact and a Schottky contact are formed at different sides of the gate structure. The method for manufacturing such diode device includes several ion-implanting steps to form several doped sub-regions with different implantation depths to constitute the doped regions. The formed MOS P-N junction Schottky diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.Type: GrantFiled: April 21, 2009Date of Patent: August 5, 2014Assignee: PFC Device Corp.Inventors: Kuo-Liang Chao, Hung-Hsin Kuo, Tse-Chuan Su
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Patent number: 8728878Abstract: A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.Type: GrantFiled: January 11, 2013Date of Patent: May 20, 2014Assignee: PFC Device Corp.Inventors: Kuo-Liang Chao, Hung-Hsin Kuo, Tse-Chuan Su
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Publication number: 20140077328Abstract: A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.Type: ApplicationFiled: November 15, 2013Publication date: March 20, 2014Applicant: PFC DEVICE CORP.Inventors: Kou-Liang CHAO, Mei-Ling CHEN, Tse-Chuan SU, Hung-Hsin KUO
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Patent number: 8618626Abstract: A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.Type: GrantFiled: October 12, 2010Date of Patent: December 31, 2013Assignee: PFC Device CorporationInventors: Kou-Liang Chao, Mei-Ling Chen, Tse-Chuan Su, Hung-Hsin Kuo
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Patent number: 8405184Abstract: A trench Schottky diode and its manufacturing method are provided. The trench Schottky diode includes a semiconductor substrate having therein a plurality of trenches, a gate oxide layer, a polysilicon structure, a guard ring and an electrode. At first, the trenches are formed in the semiconductor substrate by an etching step. Then, the gate oxide layer and the polysilicon structure are formed in the trenches and protrude above a surface of the semiconductor substrate. The guard ring is formed to cover a portion of the resultant structure. At last, the electrode is formed above the guard ring and the other portion not covered by the guard ring. The protruding gate oxide layer and the protruding polysilicon structure can avoid cracks occurring in the trench structure.Type: GrantFiled: June 28, 2010Date of Patent: March 26, 2013Assignee: PFC Device CorporationInventors: Kou-Liang Chao, Hung-Hsin Kuo, Tse-Chuan Su, Mei-Ling Chen
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Patent number: 8390081Abstract: A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.Type: GrantFiled: April 21, 2009Date of Patent: March 5, 2013Assignee: PFC Device Corp.Inventors: Kuo-Liang Chao, Hung-Hsin Kuo, Tse-Chuan Su
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Publication number: 20110084353Abstract: A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.Type: ApplicationFiled: October 12, 2010Publication date: April 14, 2011Applicant: PFC DEVICE CORPORATIONInventors: Kou-Liang CHAO, Mei-Ling Chen, Tse-Chuan Su, Hung-Hsin Kuo
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Publication number: 20100327288Abstract: A trench Schottky diode and its manufacturing method are provided. The trench Schottky diode includes a semiconductor substrate having therein a plurality of trenches, a gate oxide layer, a polysilicon structure, a guard ring and an electrode. At first, the trenches are formed in the semiconductor substrate by an etching step. Then, the gate oxide layer and the polysilicon structure are formed in the trenches and protrude above a surface of the semiconductor substrate. The guard ring is formed to cover a portion of the resultant structure. At last, the electrode is formed above the guard ring and the other portion not covered by the guard ring. The protruding gate oxide layer and the protruding polysilicon structure can avoid cracks occurring in the trench structure.Type: ApplicationFiled: June 28, 2010Publication date: December 30, 2010Applicant: PFC DEVICE CORPORATIONInventors: Kou-Liang CHAO, Hung-Hsin Kuo, Tse-Chuan Su, Mei-Ling Chen
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Publication number: 20090261427Abstract: A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.Type: ApplicationFiled: April 21, 2009Publication date: October 22, 2009Applicant: PFC DEVICE CO.Inventors: Kuo-Liang CHAO, Hung-Hsin KUO, Tse-Chuan SU
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Publication number: 20090261428Abstract: A MOS P-N junction Schottky diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. An ohmic contact and a Schottky contact are formed at different sides of the gate structure. The method for manufacturing such diode device includes several ion-implanting steps to form several doped sub-regions with different implantation depths to constitute the doped regions. The formed MOS P-N junction Schottky diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.Type: ApplicationFiled: April 21, 2009Publication date: October 22, 2009Applicant: PFC DEVICE CO.Inventors: Kuo-Liang CHAO, Hung-Hsin Kuo, Tse-Chuan Su