Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.

Abstract: The present invention discloses a receiver capable of enhancing accuracy of signal reception. The receiver includes a variable termination resistance unit, coupled to at least one channel, for utilizing at least one termination resistance corresponding to the at least one channel to perform impedance matching, and a signal detection and termination resistance adjustment unit, for detecting at least one external calibration signal corresponding to the at least one channel from at least one external signal generator, and adjusting the at least one termination resistance.

Abstract: A multiple polarity inversion driving method is provided, capable of being operated in a number of inversion schemes, and being flexibly adjusted in accordance with different design requirements and application conditions. The driving method includes providing display data in accordance with an inversion switching time unit as a repeated time unit. The inversion switching time unit has a number of different types of polarity distribution pattern intervals. Additionally, the display data provided to the different types of polarity distribution pattern intervals respectively have different types of polarity distribution patterns on the display.

Abstract: A source driver apparatus configured to drive a display panel is provided. The source driver apparatus includes a data operation circuit and a pixel driving circuit. The data operation circuit is configured to receive pixel data and perform a polarity determination operation on the pixel data to determine a polarity distribution information of pixels on the display panel. The pixel driving circuit is coupled to the data operation circuit. The pixel driving circuit is configured to drive the display panel according to the pixel data and the polarity distribution information. Furthermore, a driving method of the display panel is also provided.

Abstract: A display driving method including the following steps is provided. A common voltage is provided to define a reference voltage of a display. The reference voltage is sequentially switched between a plurality of AC voltage swings, between a plurality of DC voltage levels, or between one or more AC voltage swings and one or more DC voltage levels. Each of the plurality of AC voltage swings is provided for a time length of one or more frames. The step of providing the common voltage is repeated one or more times. A display driving circuit using the same is also provided.

Abstract: A gate driver for controlling a display apparatus is provided. The gate driver includes a logic circuit, a plurality of buffers, and a charge sharing module. The logic circuit generates a plurality of switch signals. The buffers are coupled to the logic circuit. Each of the buffers determines to provide a first voltage or a second voltage according to one of the switch signals to generate a gate driving signal. The charge sharing module is coupled to the output ends of the buffers and allows the output ends of the buffers to share charges according to a plurality of sharing signals during a forward edge and a backward edge of a square wave of each of the gate driving signals. Furthermore, a gate driving method for controlling a display apparatus is also provided.

Abstract: An interface circuit includes a receiver, a first terminal resistor, a second terminal resistor, a common mode capacitor, a first switch, a second switch, and a common mode potential adjustment circuit. The receiver includes a first channel for receiving a first channel voltage, and a second channel for receiving a second channel voltage. The common mode capacitor provides a common mode potential. The first switch electrically connects the first terminal resistor to the common mode capacitor, and the second switch electrically connects the second terminal resistor to the common mode capacitor. The common mode potential adjustment circuit is coupled to the first switch, the second switch and the common mode capacitor, and adjusts the common mode potential according to the first channel voltage and the second channel voltage.

Abstract: A charge recycling device for a panel display apparatus is disclosed. The charge recycling device includes one or more storage capacitors, and one or more switch modules coupled to the one or more storage capacitors and coupled to a plurality of load capacitors via a plurality of source driving nodes, for controlling currents between the plurality of load capacitors and the one or more storage capacitors. During a charge recycling period, the one or more switch modules are arranged to recycle charges stored in the plurality of load capacitors to the one or more storage capacitors. During a charge reutilization period, the one or more switch modules are arranged to redistribute the recycled charges to the plurality of load capacitors.

Abstract: An image display system is disclosed. A gate driver drives includes a first side driving circuit and a second side driving circuit. The first and the second side driving circuits are disposed on the both sides of the pixel array. A first shift register receives a first shifted signal to generate a second shifted signal such that the gate driver drives a first row of pixels. A second shift register receives a third shifted signal to generate a fourth shifted signal. A third shift register is coupled to the second shift register and receives the fourth shifted signal to generate a fifth shifted signal such that the gate driver drives a second row of pixels. The first and the third shifted signals are simultaneously generated according to a vertical start pulse, and the second and the fourth shifted signals are simultaneously output.

Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.

Abstract: An interface circuit includes a receiver, a first terminal resistor, a second terminal resistor, a switch circuit and a switch control circuit. The receiver has a first channel and a second channel. The first channel receives a first channel voltage, and the second channel receives a second channel voltage. According to the first channel voltage and the second channel voltage, the switch control circuit controls the switch circuit to discharge a common mode capacitor before the first terminal resistor or the second terminal resistor couple to the common mode capacitor.

Abstract: An interface circuit includes a receiver, a first terminal resistor, a second terminal resistor, a common mode capacitor, a first switch, a second switch, and a common mode potential adjustment circuit. The receiver includes a first channel for receiving a first channel voltage, and a second channel for receiving a second channel voltage. The common mode capacitor provides a common mode potential. The first switch electrically connects the first terminal resistor to the common mode capacitor, and the second switch electrically connects the second terminal resistor to the common mode capacitor. The common mode potential adjustment circuit is coupled to the first switch, the second switch and the common mode capacitor, and adjusts the common mode potential according to the first channel voltage and the second channel voltage.

Abstract: An interface circuit includes a receiver, a first terminal resistor, a second terminal resistor, a switch circuit and a switch control circuit. The receiver has a first channel and a second channel. The first channel receives a first channel voltage, and the second channel receives a second channel voltage. According to the first channel voltage and the second channel voltage, the switch control circuit controls the switch circuit to discharge a common mode capacitor before the first terminal resistor or the second terminal resistor couple to the common mode capacitor.

Abstract: The present invention discloses a receiver capable of enhancing accuracy of signal reception. The receiver includes a variable termination resistance unit, coupled to at least one channel, for utilizing at least one termination resistance corresponding to the at least one channel to perform impedance matching, and a signal detection and termination resistance adjustment unit, for detecting at least one external calibration signal corresponding to the at least one channel from at least one external signal generator, and adjusting the at least one termination resistance.

Abstract: The present invention discloses a reception circuit capable of enhancing accuracy of signal reception. The reception circuit includes a variable termination resistance unit, coupled to at least one channel, for utilizing at least one termination resistance corresponding to the at least one channel to perform impedance matching, a receiver, coupled to the at least one channel, for receiving a calibration signal to generate a digital calibration signal, and a data determination control unit, for comparing the digital calibration signal with a predefined data, to adjust the at least one termination resistance.

Abstract: A charge recycling device for a panel display apparatus is disclosed. The charge recycling device includes one or more storage capacitors, and one or more switch modules coupled to the one or more storage capacitors and coupled to a plurality of load capacitors via a plurality of source driving nodes, for controlling currents between the plurality of load capacitors and the one or more storage capacitors. During a charge recycling period, the one or more switch modules are arranged to recycle charges stored in the plurality of load capacitors to the one or more storage capacitors. During a charge reutilization period, the one or more switch modules are arranged to redistribute the recycled charges to the plurality of load capacitors.

Abstract: A multiple common voltage driving method adapted for a display is provided. The driving method includes following steps: taking a common-voltage switching time unit as a repeating time unit to provide a common voltage to define a reference voltage of the display. The common-voltage switching time unit has a plurality of different types of common-voltage pattern periods. A time length of each of the common-voltage pattern periods includes at least one frame. During the different types of the common-voltage pattern periods, the provided common voltage has different AC voltage swings or different DC voltage levels.

Abstract: A gate driver includes a gate driving logic circuit for generating a plurality of switch signals, a plurality of output modules each including a modulation circuit for responding to one of the plurality of switch signals to generate an intermediate signal at an intermediate terminal, a buffer for responding to the intermediate signal to generate a gate driving signal at an output terminal, and a modulation switch for determining an electric connection between the intermediate terminal and the output terminal. The modulation switch is turned on during a modulation period of the gate driving signal to modulate a waveform of the gate driving signal.

Abstract: A sensing circuit for a capacitive touch panel is disclosed. By adding a path for a noise to pass through, the noise is differentially processed through two paths which have the same electrical conditions with each other. The noise is then decreased significantly, and a sensing signal can be detected correctly.

Abstract: A system for displaying images includes a touch sensing circuit. The touch sensing circuit comprises a voltage storage unit for detecting whether a touch event has occurred and generates a corresponding voltage. The voltage storage unit comprises first to third capacitors. The first capacitor has a first terminal coupled to a ground terminal and a second terminal coupled to a first node. The second capacitor has a first terminal coupled to the ground terminal and a second terminal coupled to a second node. When the voltage storage unit detects that a touch event has occurred, the second node is coupled to an AC voltage. The third capacitor is formed between the first and second nodes. When the touch event has occurred, a value of the third capacitor is changed, so that the corresponding voltage at the first node is changed.