Abstract: This document describes a spatial light modulator that comprises a pixel array having a plurality of pixels whereby each pixel in this array is communicatively coupled to a digital pixel circuit which are in turn all coupled to a bit-plane control circuit. The bit-plane control circuit is configured to generate, using a Pulse Code Modulation (PCM) algorithm, bit-plane signals that are used to control the sample and hold functions performed by each of the digital pixel circuits so that the pixel array may carry out its scanning function accurately and in a power efficient manner.

Abstract: This document describes a spatial light modulator that comprises a pixel array having a plurality of pixels whereby each pixel in this array is communicatively coupled to a digital pixel circuit which are in turn all coupled to a bit-plane control circuit. The bit-plane control circuit is configured to generate, using a Pulse Code Modulation (PCM) algorithm, bit-plane signals that are used to control the sample and hold functions performed by each of the digital pixel circuits so that the pixel array may carry out its scanning function accurately and in a power efficient manner.

Abstract: There is provided a method of communication between functional blocks in a system-on-chip.

Abstract: There is provided a method of generating training data for a machine learning model for predicting performance in electronic design using at least one processor, the method including: generating a first set of training data based on a first set of input design parameters and an electronic design automation tool; generating a first covariance information associated with the first set of input design parameters based on the first set of training data; determining a second set of input design parameters based on the first covariance information; and generating a second set of training data based on the second set of input design parameters and the electronic design automation tool. There is also provided a corresponding system for generating training data for a machine learning model for predicting performance in electronic design.

Abstract: There is provided a method of predicting performance in electronic design based on machine learning using at least one processor, the method including: providing a first machine learning model configured to predict performance data for an electronic system based on a set of input design parameters for the electronic system; providing a second machine learning model configured to generate a new set of parameter values for the set of input design parameters for the electronic system based on a desired performance data provided for the electronic system; generating, using the second machine learning model, the new set of parameter values for the set of input design parameters for the electronic system based on the desired performance data provided for the electronic system; evaluating the set of input design parameters having the new set of parameter values for the electronic system to obtain an evaluated performance data associated with the set of input design parameters having the new set of parameter values;

Abstract: Various embodiments may provide a delta sigma modulator for generating a digital output voltage. The delta sigma modulator may include a capacitance-to-voltage converter for converting a sensed continuous-in-time applied capacitance signal to a delta analog output voltage signal. The modulator may also include an integrator circuit arrangement configured to generate an analog output voltage signal based on the delta analog output voltage signal. The modulator may additionally include a quantizer circuit arrangement configured to generate the digital output signal based on the analog output voltage signal. The modulator may further include a voltage digital-to-analog converter configured to generate the analog charging voltage based on the digital output signal, thereby generating the delta analog output voltage signal based on the digital output signal.

Abstract: Various embodiments may provide a delta sigma modulator for generating a digital output voltage. The delta sigma modulator may include a capacitance-to-voltage converter for converting a sensed continuous-in-time applied capacitance signal to a delta analog output voltage signal. The modulator may also include an integrator circuit arrangement configured to generate an analog output voltage signal based on the delta analog output voltage signal. The modulator may additionally include a quantizer circuit arrangement configured to generate the digital output signal based on the analog output voltage signal. The modulator may further include a voltage digital-to-analog converter configured to generate the analog charging voltage based on the digital output signal, thereby generating the delta analog output voltage signal based on the digital output signal.

Abstract: According to an embodiment of the present invention, a method of determining or adjusting the sensitivity of a biosensor arrangement comprising at least one field effect biosensor is provided, each of the at least one field effect biosensor comprising: a semiconductor substrate comprising a source region, a drain region and a channel region disposed between the source region and the drain region; a gate isolation layer covering the channel region; and a reference electrode disposed over the gate isolation layer such that a electrolytic solution to be sensed can be provided between the reference electrode and the gate isolation layer.

Abstract: According to an embodiment of the present invention, a method of determining or adjusting the sensitivity of a biosensor arrangement comprising at least one field effect biosensor is provided, each of the at least one field effect biosensor comprising: a semiconductor substrate comprising a source region, a drain region and a channel region disposed between the source region and the drain region; a gate isolation layer covering the channel region; and a reference electrode disposed over the gate isolation layer such that a electrolytic solution to be sensed can be provided between the reference electrode and the gate isolation layer.