Patents by Inventor Tsugumi Matsuishi

Tsugumi Matsuishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050146337
    Abstract: A method of manufacturing a semiconductor device including mounting semiconductor chips, each chip having pads, on respective areas of a front surface of an assembly substrate, electrically connecting corresponding terminals on a rear surface of the assembly substrate through wirings of the assembly substrate to the pads of the semiconductor chips, respective terminals and wirings electrically connected to a semiconductor chip being confined within the corresponding area of the assembly substrate on which the semiconductor chip is mounted, inputting test waveforms to the pads of the plurality of semiconductor chips through the corresponding terminals and wirings and testing the semiconductor chips, and, after the testing the semiconductor chips, cutting the assembly substrate with a rotating blade into pieces corresponding to the respective areas. The terminals and wirings connecting the terminals to the semiconductor chips are not cut by the rotating blade.
    Type: Application
    Filed: February 11, 2005
    Publication date: July 7, 2005
    Applicant: Renesas Technology Corp.
    Inventors: Mitsunori Matsunaga, Tsugumi Matsuishi
  • Publication number: 20050098778
    Abstract: An assembly substrate, on which semiconductor chips, each having a terminal receiving a burn-in test waveform, are arranged, is detachably attached to a burn-in test adapter. The burn-in test adapter has wiring for, when an assembly substrate is attached to the burn-in test adapter, making an electrical contact with the terminal of each of the semiconductor chips on the assembly substrate. Moreover, the burn-in test adapter has a burn-in test terminal that is electrically connected to the wiring and that receives the burn-in test waveform.
    Type: Application
    Filed: July 9, 2003
    Publication date: May 12, 2005
    Applicant: Renesas Technology Corp.
    Inventors: Mitsunori Matsunaga, Tsugumi Matsuishi
  • Publication number: 20040135177
    Abstract: A block, which is an object to be scanned, of a semiconductor integrated circuit includes a scan flip-flop and a combinational circuit. A serial-parallel conversion unit receives serial scan output data output from the scan flip-flop of the block and converts the serial scan output data into parallel scan output data. A scan output storage stores the parallel scan output data output from the serial-parallel conversion unit, and outputs the parallel scan output data stored to outside of the semiconductor integrated circuit.
    Type: Application
    Filed: October 20, 2003
    Publication date: July 15, 2004
    Applicant: Renesas Technology Corp.
    Inventor: Tsugumi Matsuishi
  • Patent number: 6601177
    Abstract: A semiconductor integrated circuit including circuit groups and driving the circuit groups with respective power supply voltages, digital-to-analog converters that supply the power supply voltages to the circuit groups, and delay measurement circuits that measure delays of circuit element of the circuit groups. This semiconductor integrated circuit includes a central processing unit that establishes settings of registers based on measurements by the delay measurement circuits to control each of the power supply voltages.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: July 29, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaki Fujigaya, Tsugumi Matsuishi, Taketora Shiraishi, Yutaka Uneme, Satoru Kinoshita
  • Patent number: 5463738
    Abstract: An address detection circuit is formed in a pod so that the circuit generates a detection signal DET when an address signal specifying an address in the address area assigned to a newly-added circuit section is outputted from an evaluation MCU, and a disabling circuit 313 is formed in a port emulation circuit 31a so that the circuit 313 disables an input/output circuit 312 from being set to the input state by responding to the detection signal DET.
    Type: Grant
    Filed: June 23, 1992
    Date of Patent: October 31, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tsugumi Matsuishi, Toshihiko Hori, Shinji Suda