Patents by Inventor Tsukasa Oishi
Tsukasa Oishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9467090Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.Type: GrantFiled: January 9, 2015Date of Patent: October 11, 2016Assignee: Renesas Electronics CorporationInventors: Tsukasa Oishi, Katsuyoshi Mitsui, Naoki Otani
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Publication number: 20150116041Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.Type: ApplicationFiled: January 9, 2015Publication date: April 30, 2015Inventors: Tsukasa OISHI, Katsuyoshi MITSUI, Naoki OTANI
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Patent number: 8963650Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.Type: GrantFiled: August 9, 2012Date of Patent: February 24, 2015Assignee: Renesas Electronics CorporationInventors: Tsukasa Oishi, Katsuyoshi Mitsui, Naoki Otani
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Publication number: 20120299663Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.Type: ApplicationFiled: August 9, 2012Publication date: November 29, 2012Inventors: Tsukasa OISHI, Katsuyoshi Mitsui, Naoki Otani
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Patent number: 8264294Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.Type: GrantFiled: February 4, 2011Date of Patent: September 11, 2012Assignee: Renesas Electronics CorporationInventors: Tsukasa Oishi, Katsuyoshi Mitsui, Naoki Otani
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Publication number: 20110193640Abstract: This invention provides a semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A temperature sensor detects the ambient temperature of the high speed OCO and a voltage sensor detects the operating voltage of the high speed OCO. The power supply module includes a BGR and generates the reference voltage, reference current, and operating voltage of the high speed OCO, based on a primary reference voltage which is output by the BGR. A flash memory stores a table specifying trimming codes for the reference voltage and reference current, related to an ambient temperature and an operating voltage of the high speed OCO.Type: ApplicationFiled: February 4, 2011Publication date: August 11, 2011Inventors: Tsukasa OISHI, Katsuyoshi Mitsui, Naoki Otani
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Patent number: 7779333Abstract: There is provided a semiconductor device of which the circuit scale does not significantly increase even with an ECC function. A microcomputer having an internal flash memory inserts one weight in a sense amplifier activation signal only when an error detection signal is on the H level at a given time in a read cycle or when the error detection signal which was on the H level in a previous read cycle has shifted to the L level in a current read cycle. This allows the retrieval of output data signals after waiting till the output data signals through error correction are determined only when an error is contained in the output data signals.Type: GrantFiled: January 9, 2007Date of Patent: August 17, 2010Assignee: Renesas Technology Corp.Inventors: Yasuhiko Taito, Masashi Muto, Eiji Sakuma, Tsukasa Oishi
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Patent number: 7630242Abstract: With this flash memory, because a plurality of memory blocks are formed on a surface of a single P-type well, a layout area can be made small. Further, when erasing data for a memory block to be erased, a voltage of the P-type well is applied to all word lines of a memory block to be not erased. Consequently, the voltage of the P-type well and the voltage of all word lines of the memory block to be not erased change at the same time. With this, it is possible to prevent a threshold voltage for the memory block to be not erased from changing.Type: GrantFiled: March 11, 2008Date of Patent: December 8, 2009Assignee: Renesas Technology Corp.Inventors: Yasuhiko Taito, Naoki Otani, Tomohisa Iba, Tsukasa Oishi
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Publication number: 20080225592Abstract: With this flash memory, because a plurality of memory blocks are formed on a surface of a single P-type well, a layout area can be made small. Further, when erasing data for a memory block to be erased, a voltage of the P-type well is applied to all word lines of a memory block to be not erased. Consequently, the voltage of the P-type well and the voltage of all word lines of the memory block to be not erased change at the same time. With this, it is possible to prevent a threshold voltage for the memory block to be not erased from changing.Type: ApplicationFiled: March 11, 2008Publication date: September 18, 2008Inventors: Yasuhiko Taito, Naoki Otani, Tomohisa Iba, Tsukasa Oishi
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Publication number: 20070226597Abstract: There is provided a semiconductor device of which the circuit scale does not significantly increase even with an ECC function. A microcomputer having an internal flash memory inserts one weight in a sense amplifier activation signal only when an error detection signal is on the H level at a given time in a read cycle or when the error detection signal which was on the H level in a previous read cycle has shifted to the L level in a current read cycle. This allows the retrieval of output data signals after waiting till the output data signals through error correction are determined only when an error is contained in the output data signals.Type: ApplicationFiled: January 9, 2007Publication date: September 27, 2007Inventors: Yasuhiko Taito, Masashi Muto, Eiji Sakuma, Tsukasa Oishi
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Patent number: 5849376Abstract: A laminate having an excellent gas barrier property and an improved organic solvent resistance and suitable for use in containers for chemicals and volatile materials such as organic solvents and fuels. The laminate comprises:(A) a layer comprising (A1) a hydrolyzed ethylene-vinyl acetate copolymer having an ethylene content of 10 to 70% by mole and a degree of hydrolysis of at least 85% by mole,(B) a layer of a resin composition comprising (B1) a polyolefin resin and (B2) 0.Type: GrantFiled: August 19, 1996Date of Patent: December 15, 1998Assignee: Nippon Gohsei Kagaku Kogyo Kabushiki KaishaInventors: Tsukasa Oishi, Masahiko Toyozumi
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Patent number: 5373054Abstract: A process for agglomerating a polymer powder which comprises mixing a polymer powder with an oxyalkylene group-containing polyvinyl alcohol resin in the presence of water and drying the resulting mixture. According to the process of the present invention, it is possible to easily prepare the polymer granules having little fine powder, a narrow particle size distribution and a large average particle size.Type: GrantFiled: December 9, 1992Date of Patent: December 13, 1994Assignee: Nippon Gohsei Kagaku Kogyo Kabushiki KaishaInventors: Shinji Sanuki, Yoshinori Chosakon, Tsukasa Oishi
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Patent number: 5190712Abstract: A method for melt-molding a water-soluble vinyl alcohol polymer which includes melt-molding a water-soluble oxyalkylene group-containing vinyl alcohol copolymer under substantially anhydrous conditions and substantially without use of plasticizer, the copolymer having a vinyl alcohol unit (A), a vinyl ester unit (B) and an oxyalkylene ether unit (C) of the formulas: ##STR1## wherein R.sup.1 is an alkyl group; R.sup.2 and R.sup.3 each is a hydrogen atom or an alkyl group; R.sup.4 is a hydrogen atom, an alkyl group, a phenyl group or a substituted phenyl group; n is equal to 1 through 50; in proportions of a mol %, b mol % and c mol %, respectively, where0.1.ltoreq.c.ltoreq.20,50.ltoreq.100a/(a+b).ltoreq.100,and the oxyalkylene moiety (CHR.sup.2 --CHR.sup.3 --O--).sub.n of unit (C) accounts for 3 to 40 percent by weight of the total resin, and having a melt index of not less than 5 g/10 min. under a load of 2160 at a temperature of 210.degree. C.Type: GrantFiled: August 30, 1991Date of Patent: March 2, 1993Assignee: Nippon Gohsei Kagaku Kogyo Kabushiki KaishaInventors: Tsukasa Oishi, Toru Seki, Takuya Honda
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Patent number: 5158810Abstract: A melt-molded article such as water soluble fibers, a laminate and a container for waste matter, the article having biodegradability. The melt molded article is produced by melt-molding a composition comprising an oxyalkylene group-containing vinyl alcohol copolymer and starch or a starch-derived macromolecular substance.Type: GrantFiled: September 4, 1991Date of Patent: October 27, 1992Assignee: Nippon Gohsei Kagaku Kogyo Kabushiki KaishaInventors: Tsukasa Oishi, Masaru Saeki, Munetoshi Tomita
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Patent number: 5136543Abstract: A semiconductor memory device comprises a plurality of bit line pairs and an input/output line pair. Each bit line pair comprises first and second bit lines supplied with complementary data, and the input/output line pair comprises first and second input/output lines supplied with complementary data. A switching circuit is provided on each bit line pair. Each switching circuit, in response to a control signal according to an address signal, respectively couples the first and the second bit lines to the first and the second input/output lines, or inversely, respectively couples the first and the second bit lines to the second and the first input/output lines.Type: GrantFiled: July 31, 1991Date of Patent: August 4, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yoshio Matsuda, Kazuyasu Fujishima, Kazutami Arimoto, Masaki Tsukude, Tsukasa Oishi
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Patent number: 4954567Abstract: A process for preparing a substantially particulate polyvinyl alcohol having a high degree of polymerization of which a 4% by weight aqueous solution has a viscosity at 20.degree. C. of not less than 80 cps, which comprises hydrolyzing a substantially particulate polyvinyl ester having a high degree of polymerization in an alcohol containing an alkali catalyst in heterogeneous system. According to the process of the present invention, there can be easily produced a substantially particulate polyvinyl alcohol having high degree of polymerization, which has the high bulk density and the excellent powder flowability.Type: GrantFiled: April 1, 1988Date of Patent: September 4, 1990Assignee: Nippon Gohsei Kagaku Kogyo Kabushiki KaishaInventors: Tsukasa Oishi, Tomohisa Okuda
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Patent number: 4946720Abstract: A container for filthy matter particularly suited for use as a bag for collecting waste matter discharged through the artifical anus is essentially made of a single-layer or multilayer packaging material comprising an oxyalkylene group-containing vinyl alcohol copolymer film layer.Type: GrantFiled: December 15, 1988Date of Patent: August 7, 1990Assignees: Nippon Gohsei Kagaku Kogyo Kabushiki Kaisha, Nichigo Film Kabushiki KaishaInventors: Tsukasa Oishi, Toshio Marui