Patents by Inventor Tsukasa Yasuda

Tsukasa Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110204497
    Abstract: A semiconductor integrated circuit having a semiconductor chip mounted over a tape- or film-like substrate, the semiconductor integrated circuit having a higher strength against bending, as well as a method for manufacturing the semiconductor integrated circuit, are disclosed. The semiconductor integrated circuit comprises a bendable tape-like substrate, the tape-like substrate including external terminals, internal terminals provided for coupling to a rectangular semiconductor chip, and wiring lines for coupling the internal terminals and the external terminals with each other; and a reinforcing member for reinforcing the semiconductor chip over the tape-like substrate in a longitudinal direction of the semiconductor chip, the semiconductor chip and the reinforcing member being sealed with resin.
    Type: Application
    Filed: February 14, 2011
    Publication date: August 25, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Satoru Matsuda, Tsukasa Yasuda, Ichiro Matsumoto
  • Publication number: 20110057922
    Abstract: A drive device according to the present invention includes a plurality of output amplifier circuits that are connected in parallel, a bias wire that supplies a bias voltage from a bias voltage supply source to the plurality of output amplifier circuits, a power supply wire that supplies a power supply voltage from a power supply voltage supply source to the plurality of output amplifier circuits, and a correction unit that superposes an offset voltage on the bias voltage so that a voltage difference between the power supply voltage and the bias voltage supplied to the plurality of output amplifier circuits is to be desirable.
    Type: Application
    Filed: September 3, 2010
    Publication date: March 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Tsukasa YASUDA, Ichiro MATSUMOTO, Satoru MATSUDA
  • Patent number: 7859268
    Abstract: A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of the D/A converter is directly measured by a measuring device through the test switch to measure an ON resistance of a gray scale voltage selection circuit of the D/A converter.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: December 28, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Noboru Okuzono, Takashi Morigami, Tsukasa Yasuda
  • Publication number: 20100182301
    Abstract: An operational amplifier according to an exemplary aspect of the invention includes: a differential stage including a first differential transistor and a second differential transistor that serve as paired transistors; polarity switching units; and an offset adding unit that is connected to one or both of the paired transistors to change a size balance between the first differential transistor and the second differential transistor. The offset adding unit includes a first additional transistor that is connected in parallel with one or both of the paired transistors and receives the same input as one or both of the paired transistors connected, and a second additional transistor connected in series with the first additional transistor, turning on/off of the second additional transistor being controlled by a test signal. The operational amplifier according to an exemplary aspect of the invention enables determination of an offset cancel operation with higher accuracy.
    Type: Application
    Filed: January 6, 2010
    Publication date: July 22, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tsukasa Yasuda
  • Patent number: 7297874
    Abstract: A fixture includes a fitting portion fitting a long member, a mounting portion mounting a stationary portion which is shaped into a rectangular in cross section. The mounting portion includes a base portion and a first clamping portion and a second clamping portion. The first clamping portion and the second clamping portion extends in a first direction substantially perpendicular to an extending direction of the base portion from both ends of the base portion. The first and second clamping portion clamps the stationary portion therebetween. The clamping portions respectively has slip-out preventive portions. A projected portion is provided on an inner face of the first clamping portion. The second clamping portion is flexibly formed.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: November 20, 2007
    Assignee: Yazaki Corporation
    Inventors: Tsukasa Yasuda, Masahiko Nishihara
  • Publication number: 20070067693
    Abstract: A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of the D/A converter is directly measured by a measuring device through the test switch to measure an ON resistance of a gray scale voltage selection circuit of the D/A converter.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 22, 2007
    Inventors: Noboru Okuzono, Takashi Morigami, Tsukasa Yasuda
  • Publication number: 20040026577
    Abstract: A fixture includes a fitting portion fitting a long member, a mounting portion mounting a stationary portion which is shaped into a rectangular in cross section. The mounting portion includes a base portion and a first clamping portion and a second clamping portion. The first clamping portion and the second clamping portion extends in a first direction substantially perpendicular to an extending direction of the base portion from both ends of the base portion. The first and second clamping portion clamps the stationary portion therebetween. The clamping portions respectively has slip-out preventive portions. A projected portion is provided on an inner face of the first clamping portion. The second clamping portion is flexibly formed.
    Type: Application
    Filed: May 29, 2003
    Publication date: February 12, 2004
    Applicant: YAZAKI CORPORATION
    Inventors: Tsukasa Yasuda, Masahiko Nishihara
  • Patent number: 6483233
    Abstract: A color CRT is provided, which makes it possible to use a larger-sized shadow mask without increasing the size of a face panel. This CRT is comprised of a vacuum envelope having a face panel, a funnel connected to the panel, and a neck connected to the funnel. The envelope has a central longitudinal axis approximatley pernendicular to the panel. The panel has studpins fixed to the inside of its side walls. A shadow mask assembly is provided in the envelope, which includes a shadow mask and a frame for supporting the mask. The frame has an approximately rectangular front section, an approximately rectangular middle section, and an approximately rectangular rear section. The front section and the rear section extend in approximately parallel to the central longitudinal axis of the envelope. The front section is shifted outwardly with respect to the rear section to approach the side walls of the panel. The periphery of the mask is fixed to the front section.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: November 19, 2002
    Assignee: NEC Corporation
    Inventor: Tsukasa Yasuda
  • Patent number: 6020679
    Abstract: A shadow mask type color cathode ray tube prevents rotation of light emitted through slots in a shadow mask that would form a zigzagged stripe during an exposure of a fluorescent film. The slots are rotated at an angle .theta..sub.1 about a center of the slots in a direction opposite to the direction of rotation, whereby light passing through the slots is offset, so that a vertical striped fluorescent surface can be thus obtained.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: February 1, 2000
    Assignee: NEC Corporation
    Inventor: Tsukasa Yasuda