Patents by Inventor Tsun LAU

Tsun LAU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11710805
    Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: July 25, 2023
    Assignee: NANOSYS, INC.
    Inventors: Fariba Danesh, Tsun Lau, Richard P. Schneider, Jr., Michael Jansen, Max Batres
  • Patent number: 11417794
    Abstract: A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: August 16, 2022
    Assignee: NANOSYS, INC.
    Inventors: Zulal Tezcan Ozel, Tsun Lau, Benjamin Leung, Fariba Danesh
  • Patent number: 11362238
    Abstract: A light emitting diode includes a first conductivity type semiconductor material region, an active region located over the first conductivity type semiconductor material region, a second conductivity type semiconductor material layer located over the active region, a first layer containing at least one of nickel or gold located over the second conductivity type semiconductor material layer, a reflective top contact electrode located over the first layer, a dielectric material layer located over the top contact electrode and containing an opening, and a reflector located over the dielectric material layer and contacting the top contact electrode through the opening in the dielectric material layer.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 14, 2022
    Assignee: NANOSYS, INC.
    Inventors: Fariba Danesh, Tsun Lau
  • Publication number: 20210202789
    Abstract: A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
    Type: Application
    Filed: August 14, 2018
    Publication date: July 1, 2021
    Inventors: Zulal TEZCAN, Tsun LAU, Benjamin LEUNG, Fariba DANESH
  • Patent number: 10998465
    Abstract: A light emitting device includes a substrate including a doped compound semiconductor layer, a mesa structure located on the doped compound semiconductor layer and containing a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, a second-conductivity-type compound semiconductor layer, and a transparent conductive oxide layer, and a dielectric material layer laterally surrounding the mesa structure and including an upper portion that overlies a peripheral region of the mesa structure and extending above the transparent conductive oxide layer, wherein an opening in the upper portion of the dielectric material layer is located over a center region of the mesa structure.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 4, 2021
    Assignee: GLO AB
    Inventors: Fariba Danesh, Cameron Dean Danesh, Tsun Lau
  • Publication number: 20210066550
    Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 4, 2021
    Inventors: Fariba DANESH, Tsun LAU, Richard P. SCHNEIDER, JR., Michael JANSEN, Max BATRES
  • Patent number: 10804436
    Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: October 13, 2020
    Assignee: GLO AB
    Inventors: Fariba Danesh, Tsun Lau, Richard P. Schneider, Jr., Michael Jansen, Max Batres
  • Patent number: 10707190
    Abstract: A backplane can have a non-planar top surface. Insulating material portions including planar top surface regions located within a same horizontal plane are formed over the backplane. A two-dimensional array of metal plate clusters is formed over the insulating material portions. Each of the metal plate clusters includes a plurality of metal plates. Each metal plate includes a horizontal metal plate portion overlying a planar top surface region and a connection metal portion connected to a respective metal interconnect structure in the backplane. A two-dimensional array of light emitting device clusters is bonded to the backplane through respective bonding structures. Each light emitting device cluster includes a plurality of light emitting devices overlying a respective metal plate cluster.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: July 7, 2020
    Assignee: GLO AB
    Inventors: Tsun Lau, Fariba Danesh, Timothy Gallagher, Anusha Pokhriyal
  • Patent number: 10707374
    Abstract: A method of forming a light emitting device includes forming a growth mask layer including openings on a doped compound semiconductor layer, forming first light emitting diode (LED) subpixels by forming a plurality of active regions and second conductivity type semiconductor material layers employing selective epitaxy processes, and transferring each first LED subpixel to a backplane. An anode contact electrode may be formed on the second conductivity type semiconductor material layers for redundancy. The doped compound semiconductor layer may be patterned with tapered sidewalls to enhance etendue. An optically clear encapsulation matrix may be formed on the doped compound semiconductor material layer to enhance etendue. Lift-off processes may be employed for the active regions. Cracking of the LEDs may be suppressed employing a thick reflector layer.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: July 7, 2020
    Assignee: GLO AB
    Inventors: Fariba Danesh, Benjamin Leung, Tsun Lau, Zulal Tezcan, Miao-Chan Tsai, Max Batres, Michael Joseph Cich
  • Publication number: 20200127168
    Abstract: A light emitting diode includes a first conductivity type semiconductor material region, an active region located over the first conductivity type semiconductor material region, a second conductivity type semiconductor material layer located over the active region, a first layer containing at least one of nickel or gold located over the second conductivity type semiconductor material layer, a reflective top contact electrode located over the first layer, a dielectric material layer located over the top contact electrode and containing an opening, and a reflector located over the dielectric material layer and contacting the top contact electrode through the opening in the dielectric material layer.
    Type: Application
    Filed: December 19, 2019
    Publication date: April 23, 2020
    Inventors: Fariba DANESH, Tsun LAU
  • Publication number: 20200075803
    Abstract: A light emitting device includes a substrate including a doped compound semiconductor layer, a mesa structure located on the doped compound semiconductor layer and containing a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, a second-conductivity-type compound semiconductor layer, and a transparent conductive oxide layer, and a dielectric material layer laterally surrounding the mesa structure and including an upper portion that overlies a peripheral region of the mesa structure and extending above the transparent conductive oxide layer, wherein an opening in the upper portion of the dielectric material layer is located over a center region of the mesa structure.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 5, 2020
    Inventors: Fariba DANESH, Cameron Dean DANESH, Tsun LAU
  • Publication number: 20190312015
    Abstract: A backplane can have a non-planar top surface. Insulating material portions including planar top surface regions located within a same horizontal plane are formed over the backplane. A two- dimensional array of metal plate clusters is formed over the insulating material portions. Each of the metal plate clusters includes a plurality of metal plates. Each metal plate includes a horizontal metal plate portion overlying a planar top surface region and a connection metal portion connected to a respective metal interconnect structure in the backplane. A two- dimensional array of light emitting device clusters is bonded to the backplane through respective bonding structures. Each light emitting device cluster includes a plurality of light emitting devices overlying a respective metal plate cluster.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 10, 2019
    Inventors: Tsun LAU, Fariba DANESH, Timothy Gallagher, Anusha Pokhriyal
  • Publication number: 20190109262
    Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 11, 2019
    Inventors: Fariba DANESH, Tsun LAU, Richard P. SCHNEIDER, JR., Michael JANSEN
  • Publication number: 20190088820
    Abstract: A method of forming a light emitting device includes forming a growth mask layer including openings on a doped compound semiconductor layer, forming first light emitting diode (LED) subpixels by forming a plurality of active regions and second conductivity type semiconductor material layers employing selective epitaxy processes, and transferring each first LED subpixel to a backplane. An anode contact electrode may be formed on the second conductivity type semiconductor material layers for redundancy. The doped compound semiconductor layer may be patterned with tapered sidewalls to enhance etendue. An optically clear encapsulation matrix may be formed on the doped compound semiconductor material layer to enhance etendue. Lift-off processes may be employed for the active regions. Cracking of the LEDs may be suppressed employing a thick reflector layer.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 21, 2019
    Inventors: Fariba DANESH, Benjamin LEUNG, Tsun LAU, Zulal TEZCAN, Miao-Chan TSAI, Max BATRES, Michael Joseph CICH