Abstract: A battery comprising a storage section for storing battery management information transmitted/received to/from outside through a communicator; wherein, the battery management information is at least either available device information on a device which can use the battery or chargeable charger information on a charger which can charge the battery.

Abstract: A battery control circuit having a battery voltage detecting section for detecting the voltage of a battery includes a resistor and a switching element which are connected in series and which are connected to the battery in parallel, and a battery controlling section for acquiring information relating to a change in the voltage of the battery, which is detected by the battery voltage detecting section, by turning on the switching element to allow a current of the battery to flow through the resistor. The battery controlling section determines the residual capacity of the battery based on the information relating to the change in the voltage of the battery.

Abstract: A battery control circuit having a battery voltage detecting section for detecting the voltage of a battery includes a resistor and a switching element which are connected in series and which are connected to the battery in parallel, and a battery controlling section for acquiring information relating to a change in the voltage of the battery, which is detected by the battery voltage detecting section, by turning on the switching element to allow a current of the battery to flow through the resistor. The battery controlling section determines the residual capacity of the battery based on the information relating to the change in the voltage of the battery.

Abstract: A battery comprising a storage section for storing battery management information transmitted/received to/from outside through a communicator; wherein, the battery management information is at least either available device information on a device which can use the battery or chargeable charger information on a charger which can charge the battery.

Abstract: The pad arrangement of a semiconductor chip allows simultaneous testing of a plurality of semiconductor chips. A plurality of semiconductor chips are arranged on a wafer, each including a plurality of signal input/output pads arranged along four sides for inputting/outputting a signal to/from a semiconductor device, and a measurement pad arranged along opposing two of the four sides, and electrically connected to the plurality of signal input/output pads arranged along the other two opposing sides. Such arrangement enables simultaneous testing of a plurality of semiconductor chips.

Abstract: A selection circuit causes either a memory 6H or 6L to enter an enabled state according to address data A16 of address data A0-A16 when a mode signal M is 1. The selection circuit comprises OR gates (10, 12) which output different outputs. When the address data A16 is 0, a nonvolatile memory 6L enters an enabled state. Then, the memory 6L is addressed according to the address data A0-A15 so that, for example, 8-bit lower data is written therein. On the other hand, when the address data A16 is 1, a nonvolatile memory 6H becomes in an enabled state. Then, the memory 6H is addressed according to the address data A0-A15 so that, for example, 8-bit upper data is written therein. Also, when an external terminal (17) is grounded, and a mode signal become 0, the OR gates (10, 12) outputs signals 0, so that the memories 6H, 6L simultaneously become in an enabled state. When data is read from corresponding addresses of each memory, data of, for example, 16-bits is obtained.

Abstract: When writing of data into nonvolatile memories 8H and 8L is started, data D7 and D15 corresponding to the 128th word of a data input section 8B are inverted and outputted. When accurate writing is subsequently performed, the data D7 and D15 are outputted as they are. By monitoring a change of the data D7 and D15 from the nonvolatile memories 8H and 8L, it is possible to detect whether writing is still continuing or has already completed. Thus, by using nonvolatile memories of 8 bit data width or the like, a 16-bit microcomputer can be easily realized.