Patents by Inventor Tsunemori Yamaguchi
Tsunemori Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9859194Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: GrantFiled: July 12, 2016Date of Patent: January 2, 2018Assignee: ROHM CO., LTD.Inventors: Akihiro Kimura, Tsunemori Yamaguchi
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Publication number: 20160322285Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: ApplicationFiled: July 12, 2016Publication date: November 3, 2016Inventors: Akihiro KIMURA, Tsunemori YAMAGUCHI
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Patent number: 9406591Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: GrantFiled: August 12, 2015Date of Patent: August 2, 2016Assignee: ROHM CO., LTD.Inventors: Akihiro Kimura, Tsunemori Yamaguchi
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Publication number: 20150348880Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: ApplicationFiled: August 12, 2015Publication date: December 3, 2015Inventors: Akihiro KIMURA, Tsunemori YAMAGUCHI
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Patent number: 9142494Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: GrantFiled: June 10, 2014Date of Patent: September 22, 2015Assignee: ROHM CO., LTD.Inventors: Akihiro Kimura, Tsunemori Yamaguchi
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Publication number: 20140284782Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: ApplicationFiled: June 10, 2014Publication date: September 25, 2014Inventors: Akihiro KIMURA, Tsunemori YAMAGUCHI
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Patent number: 8779569Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: GrantFiled: January 17, 2011Date of Patent: July 15, 2014Assignee: Rohm Co., Ltd.Inventors: Akihiro Kimura, Tsunemori Yamaguchi
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Patent number: 8604627Abstract: The present invention aims at providing a semiconductor device capable of reliably preventing a wire bonded to an island from being disconnected due to a thermal shock, a temperature cycle and the like in mounting and capable of preventing remarkable increase in the process time. In the semiconductor device according to the present invention, a semiconductor chip is die-bonded to the surface of an island, one end of a first wire is wire-bonded to an electrode formed on the surface of the semiconductor chip to form a first bonding section and the other end of the first wire is wire-bonded to the island to form a second bonding section, while the semiconductor device is resin-sealed. A double bonding section formed by wire-bonding a second wire is provided on the second bonding section of the first wire wire-bonded onto the island.Type: GrantFiled: April 14, 2006Date of Patent: December 10, 2013Assignee: Rohm Co., Ltd.Inventors: Hideki Hiromoto, Sadamasa Fujii, Tsunemori Yamaguchi
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Publication number: 20120286412Abstract: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.Type: ApplicationFiled: January 17, 2011Publication date: November 15, 2012Applicant: ROHM CO., LTD.Inventors: Akihiro Kimura, Tsunemori Yamaguchi
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Publication number: 20100001413Abstract: The present invention aims at providing a semiconductor device capable of reliably preventing a wire bonded to an island from being disconnected due to a thermal shock, a temperature cycle and the like in mounting and capable of preventing remarkable increase in the process time. In the semiconductor device according to the present invention, a semiconductor chip is die-bonded to the surface of an island, one end of a first wire is wire-bonded to an electrode formed on the surface of the semiconductor chip to form a first bonding section and the other end of the first wire is wire-bonded to the island to form a second bonding section, while the semiconductor device is resin-sealed. A double bonding section formed by wire-bonding a second wire is provided on the second bonding section of the first wire wire-bonded onto the island.Type: ApplicationFiled: April 14, 2006Publication date: January 7, 2010Applicant: ROHM CO., LTD.Inventors: Hideki Hiromoto, Sadamasa Fujii, Tsunemori Yamaguchi
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Patent number: 7638860Abstract: A semiconductor device which can surely prevent a wire bonded to an island from breaking due to, for instance, thermal shock and temperature cycle upon mounting. The semiconductor device includes a semiconductor chip; an island die bonded with the semiconductor chip on the surface; and a wire for electrically connecting the electrode formed on the surface of the semiconductor chip with the island. The semiconductor device is further characterized in that the island has a die bonding region where the semiconductor chip is die bonded, a wire bonding region where the wire is wire bonded, and a continuous groove reaching a circumference of the island are formed between the die bonding region and the wire bonding region of the island.Type: GrantFiled: April 12, 2006Date of Patent: December 29, 2009Assignee: Rohm Co., Ltd.Inventors: Hideki Hiromoto, Sadamasa Fujii, Tsunemori Yamaguchi
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Publication number: 20090032977Abstract: The present invention is disclosed a semiconductor device which enables to easily perform a visual inspection of the bonded state between a lead and a land of wiring board. This semiconductor device comprises a lead in which at least a part of the lower surface thereof is exposed form the lower surface of the encapsulation resin and the end face thereof is exposed from the lateral surface of the encapsulation resin. The lower surface of the lead is provided with a groove which reaches the outer end edge of the lead.Type: ApplicationFiled: March 28, 2006Publication date: February 5, 2009Inventor: Tsunemori Yamaguchi
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Publication number: 20090032919Abstract: A semiconductor device which can surely prevent a wire bonded to an island from breaking due to, for instance, thermal shock and temperature cycle upon mounting. The semiconductor device includes a semiconductor chip; an island die bonded with the semiconductor chip on the surface; and a wire for electrically connecting the electrode formed on the surface of the semiconductor chip with the island. The semiconductor device is further characterized in that the island has a die bonding region where the semiconductor chip is die bonded, a wire bonding region where the wire is wire bonded, and a continuous groove reaching a circumference of the island are formed between the die bonding region and the wire bonding region of the island.Type: ApplicationFiled: April 12, 2006Publication date: February 5, 2009Inventors: Hideki Hiromoto, Sadamasa Fujii, Tsunemori Yamaguchi
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Patent number: 6782615Abstract: A plurality of electronic components having conductive connecting members are surface-mounted to a target surface of a circuit board by specifying terminal-forming areas that are each no greater than the corresponding one of the electronic components and each include at least one terminal part such that at least one of these terminal-forming areas includes a plurality of terminal parts directly and that each pair of the terminal parts within any one of the terminal-forming areas is closer to each other than any pair of the terminal parts in different ones of the terminal-forming areas. An anisotropic conductive layer is formed on this target surface so as to span these terminal-forming areas, and the plurality of electronic components are placed on this anisotropic conductive layer individually above the plurality of terminal-forming areas.Type: GrantFiled: December 2, 1998Date of Patent: August 31, 2004Assignee: ROHM Co., Ltd.Inventors: Kazutaka Shibata, Tsunemori Yamaguchi
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Patent number: 6458609Abstract: A semiconductor device includes first and second semiconductor chips. The first semiconductor chip is formed with a plurality of first electrodes on a surface thereof, while the second semiconductor chip is formed with a plurality of second electrodes on a surface thereof. These surfaces are positioned facing to each other, thereby connecting between the first electrode and the second electrode. The respective surfaces are formed with circuit elements. The circuit elements are covered by the first semiconductor chip and the second semiconductor chip The first semiconductor chip and the second semiconductor chip at their connecting portions are encapsulated by a synthetic resin that is excellent in moisture resistance. The first semiconductor chip and the second semiconductor chip are entirely packaged by a second synthetic resin that is excellent in adhesibility.Type: GrantFiled: July 7, 2000Date of Patent: October 1, 2002Assignee: Rohm Co., Ltd.Inventors: Junichi Hikita, Kazutaka Shibata, Tsunemori Yamaguchi, Tadahiro Morifuji, Osamu Miyata
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Patent number: 6404066Abstract: A semiconductor chip is bonded with a polyimide bonding agent to a lead frame of a copper alloy which has been plated with copper. The electrode of the semiconductor chip is connected to each terminal of the lead frame with a wire mainly comprising gold or copper and bonded portions between the semiconductor chip and the wires and between the lead frame and the wires are sealed with a resin. Thus, a semiconductor device can be manufactured.Type: GrantFiled: August 24, 2000Date of Patent: June 11, 2002Assignee: Rohm Co., Ltd.Inventors: Masahiro Tsuji, Tsunemori Yamaguchi
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Publication number: 20010015286Abstract: A plurality of electronic components having conductive connecting members are surface-mounted to a target surface of a circuit board in a plurality of specified terminal-forming areas each having terminal parts. An anisotropic conductive layer is formed on this target surface so as to span these terminal-forming areas, and the plurality of electronic components are placed on this anisotropic conductive layer individually above the plurality of terminal-forming areas. As the layer is heated, these electronic components are pressed against the layer such that the conductive connecting members of the electronic components become attached to and electrically conductive with corresponding ones of the terminal parts on the circuit board. The anisotropic conductive layer remains electrically insulative elsewhere.Type: ApplicationFiled: December 2, 1998Publication date: August 23, 2001Inventors: KAZUTAKA SHIBATA, TSUNEMORI YAMAGUCHI
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Patent number: 6133637Abstract: A semiconductor device includes first and second semiconductor chips. The first semiconductor chip is formed with a plurality of first electrodes on a surface thereof, while the second semiconductor chip is formed with a plurality of second electrodes on a surface thereof. These surfaces are positioned facing to each other, thereby connecting between the first electrode and the second electrode. The respective surfaces are formed with circuit elements. The circuit elements are covered by the first semiconductor chip and the second semiconductor chip The first semiconductor chip and the second semiconductor chip at their connecting portions are encapsulated by a synthetic resin that is excellent in moisture resistance. The first semiconductor chip and the second semiconductor chip are entirely packaged by a second synthetic resin that is excellent in adhesibility.Type: GrantFiled: September 18, 1998Date of Patent: October 17, 2000Assignee: Rohm Co., Ltd.Inventors: Junichi Hikita, Kazutaka Shibata, Tsunemori Yamaguchi, Tadahiro Morifuji, Osamu Miyata