Abstract: A moving image compression (or encoding) device including: a hardware processing section which compresses moving image data by hardware; a data storage section which stores the moving image data processed by the hardware processing section; and a software processing section which compresses the moving image data from the data storage section by software. The hardware processing section includes a plurality of processing sections which perform processing including a discrete cosine transform and quantization of the moving image data. The software processing section performs variable-length coding of the quantized moving image data.

Abstract: A moving image compression (or encoding) device including: a hardware processing section which compresses moving image data by hardware; a data storage section which stores the moving image data processed by the hardware processing section; and a software processing section which compresses the moving image data from the data storage section by software. The hardware processing section includes a plurality of processing sections which perform processing including a discrete cosine transform and quantization of the moving image data. The software processing section performs variable-length coding of the quantized moving image data.

Abstract: A decoding device decodes stream data including first data after first variable length encoding and second data after second variable length encoding in a stream form. The decoding device comprises: a presearch unit that, based on parameter data for each macroblock, analyzes a mode of the macroblock and performs first variable length decoding corresponding to the first variable length encoding to determine a starting address of a stream buffer in which the second data are stored; a parameter decode unit that decodes the first parameter data, based on parameter data after the first variable length decoding, to determine a parameter value of a target macroblock; and a data decode unit that performs second variable length decoding of the second data corresponding to the second variable length encoding; the data decode unit reading second data from the stream buffer based on the starting address from the presearch unit and performing the second variable length decoding of the second data.

Abstract: A method is provided for calculating an image difference between a present image and a reference image that is older than the present image by each predetermined area.

Abstract: A moving image compression (or encoding) device including: a hardware processing section which compresses moving image data by hardware; a data storage section which stores the moving image data processed by the hardware processing section; and a software processing section which compresses the moving image data from the data storage section by software. The hardware processing section includes a plurality of processing sections which perform processing including a discrete cosine transform and quantization of the moving image data. The software processing section performs variable-length coding of the quantized moving image data.

Abstract: A moving image compression (or encoding) device including: a hardware processing section which compresses moving image data by hardware; a data storage section which stores the moving image data processed by the hardware processing section; and a software processing section which compresses the moving image data from the data storage section by software. The hardware processing section includes a plurality of processing sections which perform processing including a discrete cosine transform and quantization of the moving image data. The software processing section performs variable-length coding of the quantized moving image data.

Abstract: A nonvolatile storage device is constructed so as to include a first storage device for storing data and management information thereof, a request receiving device for receiving a request for writing data at the location shown by a logical address, and an information obtaining device for obtaining the physical address corresponding to the logical address through the management information and for obtaining first management information to control the location when the location is used and second management information to control the location which is not yet used.

Abstract: A non-volatile memory apparatus has a volatile memory device that stores a first address conversion table, and a non-volatile memory device that stores a second address conversion table. A physical location of the second address conversion table stored in the non-volatile memory device is obtained based on a logic sector address relative to a received request and the first address conversion table stored in the volatile memory device. The second address conversion table stored in the non-volatile memory device is obtained based on the physical location obtained by a first address obtaining device. Data is written in the non-volatile memory apparatus based on the logic sector address relative to the request received by a receiving device and the second address conversion table. The memory device also performs error correction check and correction, renews the second address conversion table.

Abstract: When a CPU issues an instruction conforming to a second architecture, the instruction is accepted by an I/O acceptance device within a subcontroller. If an event is set in an SMI status display device in accordance with the contents of the instruction, an SMI generation device simultaneously outputs an SMI signal to the CPU. If that happens, an SMM handler executes given processing corresponding to the event, and a translated instruction is transferred to a first device control device. An instruction that can be translated by hardware circuitry is translated by an instruction translation device that comprises microcode memory. This ensures that a first device control device can be used as a structural component of hardware of a second architecture. It also allows the implementation of compatibility with a number of different computer architectures.