Patents by Inventor Tsuneo Tokumitsu
Tsuneo Tokumitsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7561001Abstract: An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.Type: GrantFiled: July 26, 2007Date of Patent: July 14, 2009Assignee: Eudyna Devices Inc.Inventors: Tsuneo Tokumitsu, Osamu Baba
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Patent number: 7532085Abstract: An electronic device includes a first transmission line, a second transmission line and a ground-coupling portion. The first transmission line is composed of a first signal line transmitting a given high frequency wave signal and a first ground. The second transmission line is composed of a second signal line transmitting the high frequency wave signal and a second ground. The ground-coupling portion couples the first ground and the second ground. A phase difference between the high frequency wave signals at both ends of the ground-coupling portion is substantially integral multiple of 180 degrees.Type: GrantFiled: May 31, 2007Date of Patent: May 12, 2009Assignee: Eudyna Devices Inc.Inventors: Tsuneo Tokumitsu, Hideki Tango, Osamu Anegawa
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Publication number: 20080048764Abstract: An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.Type: ApplicationFiled: July 26, 2007Publication date: February 28, 2008Applicant: EUDYNA DEVICES INC.Inventors: Tsuneo Tokumitsu, Osamu Baba
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Publication number: 20070279823Abstract: An electronic device includes a first transmission line, a second transmission line and a ground-coupling portion. The first transmission line is composed of a first signal line transmitting a given high frequency wave signal and a first ground. The second transmission line is composed of a second signal line transmitting the high frequency wave signal and a second ground. The ground-coupling portion couples the first ground and the second ground. A phase difference between the high frequency wave signals at both ends of the ground-coupling portion is substantially integral multiple of 180 degrees.Type: ApplicationFiled: May 31, 2007Publication date: December 6, 2007Applicant: EUDYNA DEVICES INC.Inventors: Tsuneo Tokumitsu, Hideki Tango, Osamu Anegawa
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Patent number: 6600381Abstract: A negative resistance circuit having an output terminal is connected to a first terminal of a strip shaped resonator. Anode of a variable capacitance diode is connected to a second terminal of the strip shaped resonator via a capacitor 1′. Cathode of the variable capacitance diode is grounded. One terminal of a high impedance strip shaped line is connected to the anode of the variable capacitance diode. Other terminal of the strip shaped line is grounded via a capacitor 4. The capacitor 4 has sufficiently low impedance at an oscillation frequency.Type: GrantFiled: March 23, 2001Date of Patent: July 29, 2003Assignee: Fujitsu Quantum Devices LimitedInventors: Tsuneo Tokumitsu, Osamu Baba
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Patent number: 6529051Abstract: A damping resistance 20 is connected between the drain D of an FET 10 and a first end T3 of an output transmission line 13, and a damping resistance 21 is connected between the drain D of an FET 11 and the first end T3. The source of the FET 10 and the gate of the FET 11 are connected to a ground plane on the back surface of a substrate through a via which has a parasitic inductance when a multiplied frequency exceeds 20 GHz. The gate of the FET 10 and the source of the FET 11 receive microwaves of the same frequency and phase through an input transmission line 12.Type: GrantFiled: February 27, 2001Date of Patent: March 4, 2003Assignee: Fujitsu Quantum Devices LimitedInventors: Tsuneo Tokumitsu, Osamu Baba
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Patent number: 6384785Abstract: A multifrequency-band microstrip antenna, for use in microwave to millimeter-wave band, is provided with different thicknesses of dielectric films to optimized the performance in any operating frequencies desired. In a double lamination antena substrate, for example, lamination 1 is made up of a number of dielectric films having a given dielectric constant and thickness, and lamination 2 is made up of a number of dielectric films of another given dielectric constant and thickness. An radiation element is provided between the films in lamination 2, and a ground plane is provided between the films in lamination 1. A strip conductor for propagating radio signals is provided in lamination 1 such that the ground plane intervenes between the radiation element and the strip conductor, thereby shielding the radiation element except for a slot formed in the ground plane. The input signal couples to the radiation element through the slot, thereby feeding the radiation element and operating the microstrip antenna.Type: GrantFiled: May 28, 1996Date of Patent: May 7, 2002Assignee: Nippon Telegraph and Telephone CorporationInventors: Kenji Kamogawa, Tsuneo Tokumitsu
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Publication number: 20010026195Abstract: A negative resistance circuit having an output terminal is connected to a first terminal of a strip shaped resonator. Anode of a variable capacitance diode is connected to a second terminal of the strip shaped resonator via a capacitor 1′. Cathode of the variable capacitance diode is grounded. One terminal of a high impedance strip shaped line is connected to the anode of the variable capacitance diode. Other terminal of the strip shaped line is grounded via a capacitor 4. The capacitor 4 has sufficiently low impedance at an oscillation frequency.Type: ApplicationFiled: March 23, 2001Publication date: October 4, 2001Applicant: FUJITSU QUANTUM DEVICES LIMITEDInventors: Tsuneo Tokumitsu, Osamu Baba
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Publication number: 20010017556Abstract: A damping resistance 20 is connected between the drain D of an FET 10 and a first end T3 of an output transmission line 13, and a damping resistance 21 is connected between the drain D of an FET 11 and the first end T3. The source of the FET 10 and the gate of the FET 11 are connected to a ground plane on the back surface of a substrate through a via which has a parasitic inductance when a multiplied frequency exceeds 20 GHz. The gate of the FET 10 and the source of the FET 11 receive microwaves of the same frequency and phase through an input transmission line 12.Type: ApplicationFiled: February 27, 2001Publication date: August 30, 2001Applicant: FUJITSU QUANTUM DEVICES LIMITEDInventors: Tsuneo Tokumitsu, Osamu Baba
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Patent number: 6150897Abstract: A Marchand balun cirucit having a pair of coupled lines of quarter wavelength for dividing and/or combining signals with the same amplitude and opposite phase with each other is improved by inserting a cancellation element between said pair of coupled lines. Said cancellation element may be a transmission line, a capacitor, or an inductor which improves amplitude difference error and phase difference error of a pair of outputs by controlling phase velocity for an even mode so that phase velocity for an even mode becomes equal to that for an odd mode. Thus, a balun circuit with wide operation band, and less error of amplitude difference and phase difference is obtained.Type: GrantFiled: March 27, 1998Date of Patent: November 21, 2000Assignee: Nippon Telegraph and Telephone CorporationInventors: Kenjiro Nishikawa, Ichihiko Toyoda, Tsuneo Tokumitsu
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Patent number: 5973575Abstract: A voltage controlled oscillator for wide tuning range of frequency with less phase noise has a bipolar transistor provided with a positive feedback circuit between a base and an emitter of the transistor, an impedance matching circuit coupled with a collector of the transistor and an output terminal, a resistor coupled between the base of the transistor and a control source which provides control voltage for adjusting oscillation frequency of the oscillator. The base of the transistor shows capacitive negative impedance, and an inductive element is coupled with the base of the transistor for oscillation. The emitter of the transistor is grounded for D.C. voltage through an inductor or a transmission line, or coupled with a control voltage.Type: GrantFiled: February 12, 1998Date of Patent: October 26, 1999Assignee: Nippon Telegraph and Telephone Corp.Inventors: Kenji Kamogawa, Kenjiro Nishikawa, Ichihiko Toyoda, Tsuneo Tokumitsu
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Patent number: 5739560Abstract: A monolithic integrated circuit utilizing areas associated with unused devices for wiring signal lines, thereby implementing effective wiring and improving high frequency characteristics. A common substrate consisting of a semiconductor substrate, and active devices, capacitor electrodes and resistors formed on the semiconductor substrate, is followed by a dielectric film, a ground metal, a dielectric film whose thickness is equal to or greater than 1 .mu.m, and signal lines. A desired circuit is formed by connecting the signal lines with electrodes of the active devices and other elements via, holes in the dielectric films, and windows of the ground metal. The windows of the ground metal are formed over portions of active devices which are used as components of the circuit.Type: GrantFiled: September 14, 1995Date of Patent: April 14, 1998Assignee: Nippon Telegraph and Telephone CorporationInventors: Ichihiko Toyoda, Tsuneo Tokumitsu, Kenjiro Nishikawa, Kenji Kamogawa
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Patent number: 5661437Abstract: A variable gain amplifier circuit in which a feedback circuit that feeds back the output signal of an amplifier from its output terminal to its input terminal is composed of an FET. The gate terminal of the feedback FET is connected to the output terminal of the amplifier through a capacitor, and the source terminal of the feedback FET is connected to the input terminal of the amplifier. The gain of the amplifying circuit is controlled by varying the transconductance of the feedback FET by controlling a bias voltage applied to the gate or drain terminal of the feedback FET. This makes it possible to control the gain independently of the physical dimension of the feedback FET, and at the same time, to prevent the input signal from being transmitted from the input side to the output side through the feedback circuit.Type: GrantFiled: August 11, 1995Date of Patent: August 26, 1997Assignee: Nippon Telegraph and Telephone CorporationInventors: Kenjiro Nishikawa, Tsuneo Tokumitsu
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Patent number: 5652157Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower resistance and lower parasitic interactions, an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET. Polyamide film enables an improved fabrication step to be performed in the invention, and a new processing technique for polyimide material has also been demonstrated.Type: GrantFiled: February 28, 1996Date of Patent: July 29, 1997Assignee: Nippon Telegraph And Telephone CorporationInventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda
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Patent number: 5639686Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.Type: GrantFiled: October 7, 1993Date of Patent: June 17, 1997Assignee: Nippon Telegraph and Telephone CorporationInventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda
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Patent number: 5634208Abstract: A hybrid including a substrate, a first dielectric layer, a ground metal, and a second dielectric layer, which are stacked in this order. Transmission lines are formed below and above the ground metal, and a slit is formed in the ground metal at a position corresponding to projection of the transmission lines onto the ground metal. The substrate has a greater dielectric constant than the dielectric layers. This makes it possible to prevent coupling between the upper and lower transmission lines, thereby implementing a high impedance, low loss transmission lines.Type: GrantFiled: March 26, 1996Date of Patent: May 27, 1997Assignee: Nippon Telegraph and Telephone CorporationInventors: Kenjiro Nishikawa, Ichihiko Toyoda, Tsuneo Tokumitsu, Kenji Kamogawa
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Patent number: 5550068Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.Type: GrantFiled: May 24, 1995Date of Patent: August 27, 1996Assignee: Nippon Telegraph And Telephone CorporationInventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda
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Patent number: 5546056Abstract: An injection-locked oscillator having a non-reciprocal four-port network with a pair of input ports (1, 2) and a pair of output ports (3, 4) in which the signal transfer path from a first input port (1) to a first output port (3) is non-reciprocal, the signal transfer path from a second input port (2) to a second output port (4) is non-reciprocal, the signal transfer path from a second input port (2) to a first output port (3) is non-reciprocal, and an amplifier with the input port coupled with said first output port and the output port coupled with said second input port, is locked to an injection signal applied to said first input port and provides oscillation output to said second output port (4). The circuit between the first input port (1) and the second input port (2), and the circuit between the first output port (3) and the second output port (4) are isolated. The present oscillator is implemented in a small IC chip, and has feature to be injection-locked in wide frequency band.Type: GrantFiled: January 27, 1995Date of Patent: August 13, 1996Assignee: Nippon Telegraph and Telephone CorporationInventor: Tsuneo Tokumitsu
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Patent number: 5281769Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.Type: GrantFiled: November 4, 1991Date of Patent: January 25, 1994Assignee: Nippon Telegraph and Telephone CorporationInventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda