Patents by Inventor Tsung-Han Lin

Tsung-Han Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10956330
    Abstract: In an example, an apparatus comprises a plurality of processing unit cores, a plurality of cache memory modules associated with the plurality of processing unit cores, and a machine learning model communicatively coupled to the plurality of processing unit cores, wherein the plurality of cache memory modules share cache coherency data with the machine learning model. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: March 23, 2021
    Assignee: INTEL CORPORATION
    Inventors: Chandrasekaran Sakthivel, Prasoonkumar Surti, John C. Weast, Sara S. Baghsorkhi, Justin E. Gottschlich, Abhishek R. Appu, Nicolas C. Galoppo Von Borries, Joydeep Ray, Narayan Srinivasa, Feng Chen, Ben J. Ashbaugh, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha, Eriko Nurvitadhi, Balaji Vembu, Altug Koker
  • Patent number: 10943325
    Abstract: Techniques to improve performance of matrix multiply operations are described in which a compute kernel can specify one or more element-wise operations to perform on output of the compute kernel before the output is transferred to higher levels of a processor memory hierarchy.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Nicolas C. Galoppo Von Borries
  • Publication number: 20210035255
    Abstract: One embodiment provides for a compute apparatus to perform machine learning operations, the compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction, the decoded instruction to cause the compute apparatus to perform a complex machine learning compute operation.
    Type: Application
    Filed: July 14, 2020
    Publication date: February 4, 2021
    Applicant: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha, Nadathur Rajagopalan Satish, Jeremy Bottleson, Farshad Akhbari, Altug Koker, Narayan Srinivasa, Dukhwan Kim, Sara S. Baghsorkhi, Justin E. Gottschlich, Feng Chen, Elmoustapha Ould-Ahmed-Vall, Kevin Nealis, Xiaoming Chen, Anbang Yao
  • Patent number: 10902547
    Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a plurality of processing units each comprising a plurality of execution units (EUs), wherein the plurality of EUs comprise a first EU type and a second EU type.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: January 26, 2021
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Sara S. Baghsorkhi, Justin E. Gottschlich, Altug Koker, Nadathur Rajagopalan Satish, Farshad Akhbari, Dukhwan Kim, Wenyin Fu, Travis T. Schluessler, Josh B. Mastronarde, Linda L. Hurd, John H. Feit, Jeffery S. Boles, Adam T. Lake, Karthik Vaidyanathan, Devan Burke, Subramaniam Maiyuran, Abhishek R. Appu
  • Publication number: 20200349670
    Abstract: Techniques to improve performance of matrix multiply operations are described in which a compute kernel can specify one or more element-wise operations to perform on output of the compute kernel before the output is transferred to higher levels of a processor memory hierarchy.
    Type: Application
    Filed: July 16, 2020
    Publication date: November 5, 2020
    Applicant: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Nicolas C. Galoppo Von Borries
  • Patent number: 10769748
    Abstract: One embodiment provides for a compute apparatus to perform machine learning operations, the compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction, the decoded instruction to cause the compute apparatus to perform a complex machine learning compute operation.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: September 8, 2020
    Assignee: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha, Nadathur Rajagopalan Satish, Jeremy Bottleson, Farshad Akhbari, Altug Koker, Narayan Srinivasa, Dukhwan Kim, Sara S. Baghsorkhi, Justin E. Gottschlich, Feng Chen, Elmoustapha Ould-Ahmed-Vall, Kevin Nealis, Xiaoming Chen, Anbang Yao
  • Publication number: 20200279349
    Abstract: An apparatus to facilitate processing of a sparse matrix is disclosed. The apparatus includes a plurality of processing units each comprising one or more processing elements, including logic to read operands, a multiplication unit to multiply two or more operands and a scheduler to identify operands having a zero value and prevent scheduling of the operands having the zero value at the multiplication unit.
    Type: Application
    Filed: May 21, 2020
    Publication date: September 3, 2020
    Applicant: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajikshore Barik, Nicolas C. Galoppo Von Borries
  • Publication number: 20200272160
    Abstract: Systems, methods, tangible non-transitory computer-readable media, and devices associated with the motion prediction and operation of a device including a vehicle are provided. For example, a vehicle computing system can access state data including information associated with locations and characteristics of objects over a plurality of time intervals. Trajectories of the objects at subsequent time intervals following the plurality of time intervals can be determined based on the state data and a machine-learned tracking and kinematics model. The trajectories of the objects can include predicted locations of the objects at subsequent time intervals that follow the plurality of time intervals. Further, the predicted locations of the objects can be based on physical constraints of the objects. Furthermore, indications, which can include visual indications, can be generated based on the predicted locations of the objects at the subsequent time intervals.
    Type: Application
    Filed: July 9, 2019
    Publication date: August 27, 2020
    Inventors: Nemanja Djuric, Henggang Cui, Thi Duong Nguyen, Fang-Chieh Chou, Tsung-Han Lin, Jeff Schneider, David McAllister Bradley
  • Patent number: 10706498
    Abstract: An apparatus to facilitate processing of a sparse matrix is disclosed. The apparatus includes a plurality of processing units each comprising one or more processing elements, including logic to read operands, a multiplication unit to multiply two or more operands and a scheduler to identify operands having a zero value and prevent scheduling of the operands having the zero value at the multiplication unit.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajikshore Barik, Nicolas C. Galoppo Von Borries
  • Publication number: 20200210338
    Abstract: In an example, an apparatus comprises a plurality of processing unit cores, a plurality of cache memory modules associated with the plurality of processing unit cores, and a machine learning model communicatively coupled to the plurality of processing unit cores, wherein the plurality of cache memory modules share cache coherency data with the machine learning model. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 2, 2020
    Applicant: Intel Corporation
    Inventors: Chandrasekaran Sakthivel, Prasoonkumar Surti, John C. Weast, Sara S. Baghsorkhi, Justin E. Gottschlich, Abhishek R. Appu, Nicolas C. Galoppo Von Borries, Joydeep Ray, Narayan Srinivasa, Feng Chen, Ben J. Ashbaugh, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha, Eriko Nurvitadhi, Balaji Vembu, Altug Koker
  • Patent number: 10698305
    Abstract: A color wheel module includes a fixing bracket, a carbon-iron alloy bracket, a motor, an optical filter, a first damper, and a second damper. The carbon-iron alloy bracket is fixed to the fixing bracket. The motor is fixed to the carbon-iron alloy bracket, and the motor is connected with the optical filter, so as to drive the optical filter to rotate between the motor and the fixing bracket. The first damper is disposed between the carbon-iron alloy bracket and the fixing bracket. The second damper is disposed between the motor and the carbon-iron alloy bracket.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: June 30, 2020
    Assignee: Coretronic Corporation
    Inventors: Tsung-Han Lin, Tung-Chou Hu, Min-Hsueh Lee
  • Patent number: 10679118
    Abstract: A spiking neural network (SNN) is defined that includes artificial neurons interconnected by artificial synapses, the SNN defined to correspond to one or more numerical matrices in an equation such that weight values of the synapses correspond to values in the numerical matrices. An input vector is provided to the SNN to correspond to a numerical vector in the equation. A steady state spiking rate is determined for at least a portion of the neurons in the SNN and an approximate result of a matrix inverse problem corresponding to the equation is determined based on values of the steady state spiking rates.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Tsung-Han Lin, Narayan Srinivasa
  • Patent number: 10656657
    Abstract: Systems and methods for predicting object motion and controlling autonomous vehicles are provided. In one example embodiment, a computer implemented method includes obtaining state data indicative of at least a current or a past state of an object that is within a surrounding environment of an autonomous vehicle. The method includes obtaining data associated with a geographic area in which the object is located. The method includes generating a combined data set associated with the object based at least in part on a fusion of the state data and the data associated with the geographic area in which the object is located. The method includes obtaining data indicative of a machine-learned model. The method includes inputting the combined data set into the machine-learned model. The method includes receiving an output from the machine-learned model. The output can be indicative of a predicted trajectory of the object.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: May 19, 2020
    Assignee: UATC, LLC
    Inventors: Nemanja Djuric, Vladan Radosavljevic, Thi Duong Nguyen, Tsung-Han Lin, Jeff Schneider
  • Patent number: 10636873
    Abstract: A method of fabricating a semiconductor device is provided. In the method, a gate structure is formed on a semiconductor substrate. A photolithography process is performed with a mask having two transparent regions to form a photoresist layer having two openings in the semiconductor substrate. A first photoresist layer of the photoresist layer between the two openings is aligned to the gate structure and formed on the gate structure. The width of the first photoresist layer is shorter than the width of the gate structure such that a first side portion and a second side portion of the gate structure are exposed from both sides of the first photoresist layer, respectively. Next, an ion implantation process is performed to form lightly doped drain regions in the semiconductor substrate which are on two opposite sides of the gate structure of the photoresist layer.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: April 28, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Wei Lin, Tsung-Han Lin, Chao-Wei Wu, Yen-Kai Chen
  • Patent number: 10579063
    Abstract: The present disclosure provides systems and methods for predicting the future locations of objects that are perceived by autonomous vehicles. An autonomous vehicle can include a prediction system that, for each object perceived by the autonomous vehicle, generates one or more potential goals, selects one or more of the potential goals, and develops one or more trajectories by which the object can achieve the one or more selected goals. The prediction systems and methods described herein can include or leverage one or more machine-learned models that assist in predicting the future locations of the objects. As an example, in some implementations, the prediction system can include a machine-learned static object classifier, a machine-learned goal scoring model, a machine-learned trajectory development model, a machine-learned ballistic quality classifier, and/or other machine-learned models. The use of machine-learned models can improve the speed, quality, and/or accuracy of the generated predictions.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: March 3, 2020
    Assignee: UATC, LLC
    Inventors: Galen Clark Haynes, Ian Dewancker, Nemanja Djuric, Tzu-Kuo Huang, Tian Lan, Tsung-Han Lin, Micol Marchetti-Bowick, Vladan Radosavljevic, Jeff Schneider, Alexander David Styler, Neil Traft, Huahua Wang, Anthony Joseph Stentz
  • Patent number: 10565500
    Abstract: A spiking neural network (SNN) is implemented on a neuromorphic computers and includes a plurality of neurons, a first set of the plurality of synapses defining feed-forward connections from a first subset of the neurons to a second subset of the neurons, a second subset of the plurality of synapses to define recurrent connections between the second subset of neurons, and a third subset of the plurality of synapses to define feedback connections from the second subset of neurons to the first subset of neurons. A set of input vectors are provided to iteratively modify weight values of the plurality of synapses. Each iteration involves selectively enabling and disabling the third subset of synapses with a different one of the input vectors applied to the SNN. The weight values are iteratively adjusted to derive a solution to an equation comprising an unknown matrix variable and an unknown vector variable.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: February 18, 2020
    Assignee: Intel Corporation
    Inventor: Tsung-Han Lin
  • Publication number: 20200051203
    Abstract: An apparatus to facilitate processing of a sparse matrix is disclosed. The apparatus includes a plurality of processing units each comprising one or more processing elements, including logic to read operands, a multiplication unit to multiply two or more operands and a scheduler to identify operands having a zero value and prevent scheduling of the operands having the zero value at the multiplication unit.
    Type: Application
    Filed: May 20, 2019
    Publication date: February 13, 2020
    Applicant: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajikshore Barik, Nicolas C. Galoppo Von Borries
  • Publication number: 20200034946
    Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a memory device including a first integrated circuit (IC) including a plurality of memory channels and a second IC including a plurality of processing units, each coupled to a memory channel in the plurality of memory channels.
    Type: Application
    Filed: August 5, 2019
    Publication date: January 30, 2020
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Sara S. Baghsorkhi, Justin E. Gottschlich, Altug Koker, Nadathur Rajagopalan Satish, Farshad Akhbari, Dukhwan Kim, Wenyin Fu, Travis T. Schluessler, Josh B. Mastronarde, Linda L. Hurd, John H. Feit, Jeffery S. Boles, Adam T. Lake, Karthik Vaidyanathan, Devan Burke, Subramaniam Maiyuran, Abhishek R. Appu
  • Patent number: 10534613
    Abstract: Implementations of the disclosure provide a processing device comprising a branch predictor circuit to obtain a branch history for an application. The branch history comprising references to branching instructions associated with the application and an outcome of executing each branch. Using the branch history, a neutral network is trained to produce a weighted value for each branch of the branching instructions. Features of the branching instructions are identified based on the weighted values. Each feature identifying predictive information regarding the outcome of at least one branch of correlated branches having corresponding outcomes. A feature vector is determined based on the features. The feature vector comprises a plurality of data fields that identify an occurrence of a corresponding feature of the correlated branches with respect to the branch history. Using the feature vector, a data model is produced to determine a predicted outcome associated with the correlated branches.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: January 14, 2020
    Assignee: Intel Corporation
    Inventors: Gokce Keskin, Stephen J. Tarsa, Gautham N. Chinya, Tsung-Han Lin, Perry H. Wang, Hong Wang
  • Publication number: 20200004128
    Abstract: A color wheel module includes a fixing bracket, a carbon-iron alloy bracket, a motor, an optical filter, a first damper, and a second damper. The carbon-iron alloy bracket is fixed to the fixing bracket. The motor is fixed to the carbon-iron alloy bracket, and the motor is connected with the optical filter, so as to drive the optical filter to rotate between the motor and the fixing bracket. The first damper is disposed between the carbon-iron alloy bracket and the fixing bracket. The second damper is disposed between the motor and the carbon-iron alloy bracket.
    Type: Application
    Filed: June 26, 2019
    Publication date: January 2, 2020
    Inventors: TSUNG-HAN LIN, TUNG-CHOU HU, MIN-HSUEH LEE