Abstract: A resin composition is provided.

Abstract: A stable solution of the polymer prepared from N,O-heterocyclic compound and its preparing method are provided, wherein the stable solution is prepared by making the N,O-heterocyclic compound of formulae I or II carry out a ring-opening polymerization: wherein R1 to R3, W1, W2, m, n, p and q are as defined in the specification. The stable solution can be used as a hardener for curing epoxy resin.

Abstract: An LCD apparatus includes a first polarizer, a half-wavelength retardation plate, a liquid crystal unit and a second polarizer. The LCD apparatus further has a backlight module for generating first polarized light. The first polarizer is disposed downstream of the backlight module, and the first polarizer has a transmission axis. The half-wavelength retardation plate is disposed between the backlight module and the first polarizer. Second polarized light parallel to the transmission axis is generated from the first polarized light passing through the half-wavelength retardation plate. The second polarizer is disposed downstream of the first polarizer. The liquid crystal unit is disposed between the first polarizer and the second polarizer, and the second polarized light emits out of the LCD apparatus through the first polarizer, the liquid crystal unit and the second polarizer.

Abstract: Disclosed is an epoxy resin composition for printed circuit board, which includes (A) an epoxy resin; (B) a composite curing agent, including amino-triazine-novolac resin, diaminodiphenylsulfone, and dicyandiamide mixed in a certain proportion; (C) a curing accelerator; and (D) an optional inorganic filler.

Abstract: A modulator is constructed with a loop-delay compensation. A delta-sigma modulator generates a quantization code, and a digital compensation filter receives the quantization code and outputs a digital code. The digital compensation filter then feeds the digital code back to the delta-sigma modulator.

Abstract: A backlight module includes a back plate, a plurality of lamps, a lamp fixing base, and a diffusion plate. The back plate has a cavity. The lamps are disposed on or above the back plate. The lamp fixing base is disposed on the back plate for fixing the lamps. The lamp fixing base has a supporting portion extending along a direction away from the back plate. An orthogonal projection of the supporting portion on the back plate is within a boundary of the cavity. The diffusion plate is disposed above or over the back plate, and the supporting portion is suitable for supporting the diffusion plate.

Abstract: A bandpass delta-sigma modulator is formed to include a bandpass filtering circuit that bandpass filters an input signal. An analog-to-digital converter (ADC) receives output of the bandpass filtering circuit and generates an output quantization code. A digital filter receives the output quantization code. A digital-to-analog converter (DAC) receives output of the digital filter and scales the value of the output quantization code by DAC coefficients to the bandpass filtering circuit.

Abstract: A modulator is constructed with a loop-delay compensation. A delta-sigma modulator generates a quantization code, and a digital compensation filter receives the quantization code and outputs a digital code. The digital compensation filter then feeds the digital code back to the delta-sigma modulator.

Abstract: A bandpass delta-sigma modulator is formed to include a bandpass filtering circuit that bandpass filters an input signal. An analog-to-digital converter (ADC) receives output of the bandpass filtering circuit and generates an output quantization code. A digital filter receives the output quantization code. A digital-to-analog converter (DAC) receives output of the digital filter and scales the value of the output quantization code by DAC coefficients to the bandpass filtering circuit.

Abstract: A voltage-to-digital converting device includes a first voltage-to-time converter outputting a first delay clock having a first time delay relative to a reference clock in response to an input voltage, and a second voltage-to-time converter outputting a second delay clock having a second time delay relative to the reference clock in response to a feedback voltage. The first and second time delays correspond respectively to the input and feedback voltages. A time-to-digital converting circuit receives the first and second delay clocks from the first and second voltage-to-time converters, compares phases of the first and second delay clocks, generates the feedback voltage based on result of phase comparison made thereby, and outputs a digital signal upon detecting that the phases of the first and second delay clocks are in-phase.

Abstract: The present invention provides a method of repairing a molding die for molding glass, the molding die for molding glass comprising a base member, a first buffer layer on the base member, which is made of titanium or any material which is easily attacked by a first attack solution, wherein the first attack solution includes hydrofluoric acid, a protective film on the first buffer layer; the method comprising the steps of using the first attack solution to remove the first buffer layer that causes no damage on the base member, and then operating a sputtering process to build a new first buffer layer and a new protective layer on the base member.

Abstract: A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.

Abstract: The present invention provides a reflective liquid crystal display assembly, which includes a first substrate, a second substrate and a liquid crystal layer sealed between them. The present invention designs a specific surface structure of at least one of the first and second substrates relative to the liquid crystal layer so that the helical axes of the cholesteric liquid crystal molecules can incline in different directions as desired in the liquid crystal layer. The reflective spectrum can be broadened and the viewing angle is widened.

Abstract: A liquid crystal display device is provided that has a plurality of pixel regions where some of the pixel regions have liquid crystal molecules that operate according to both twisted nematic mode and vertical alignment mode.

Abstract: A radio frequency modulating circuit of a transmitter includes a phase multiplexer including a plurality of phase followers each coupled to a selector and operating in accordance with a corresponding pair of complementary-level carrier signals received thereby. The selector is operable to enable conduction of one of the phase followers therethrough in response to a data sequence modulated from a data stream by a phase shift keying modulating circuit. A conversion amplifier is operable in accordance with the complementary-level carrier signals of a conducting one of the phase followers so as to output a phase-modulated output corresponding to the data stream. The phase-modulated output is amplified by a power amplifier and is transmitted through an antenna.

Abstract: A voltage-to-digital converting device includes a first voltage-to-time converter outputting a first delay clock having a first time delay relative to a reference clock in response to an input voltage, and a second voltage-to-time converter outputting a second delay clock having a second time delay relative to the reference clock in response to a feedback voltage. The first and second time delays correspond respectively to the input and feedback voltages. A time-to-digital converting circuit receives the first and second delay clocks from the first and second voltage-to-time converters, compares phases of the first and second delay clocks, generates the feedback voltage based on result of phase comparison made thereby, and outputs a digital signal upon detecting that the phases of the first and second delay clocks are in-phase.

Abstract: A phase locked loop includes a voltage controlled oscillator operable to generate an output signal corresponding to a reference signal in response to a control voltage signal outputted by a filter in response to a current signal, and a variable frequency divider operable to perform frequency division on the output signal using a variable divisor so as to generate a divided feedback signal. A charge pump outputs the current signal in response to a phase detecting output from a phase/frequency detector indicating phases of the divided feedback signal and the reference signal. A phase error comparator outputs, in accordance with the phase detecting output, a digital output indicating whether the divided feedback signal lags or leads the reference signal and further indicating a phase difference between the divided feedback signal and the reference signal.

Abstract: A method of fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulator is formed on the substrate to cover the gate. A source/drain layer is formed on the gate insulator, and a portion of the gate insulator above the gate is exposed by the source/drain layer. An isolated layer is formed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. A channel layer is formed in the opening of the isolated layer to be electrically connected to the source/drain layer, and the channel layer is exposed by the opening.

Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.

Abstract: A high-speed differential signaling logic gate includes a 1st input transistor, 2nd input transistor, complimentary transistor, current source, a 1st load, and a 2nd load. The 1st input transistor is operably coupled to receive a 1st input logic signal, which may be one phase of a first differential input signal. The 2nd input transistor is coupled in parallel with the 1st input transistor and is further coupled to receive a 2nd input logic signal, which may be one phase of a 2nd differential input signal. The complimentary transistor is operably coupled to the sources of the 1st and 2nd input transistors and to receive a complimentary input signal, which mimics the other phase of the 1st differential logic signal and the 2nd differential logic signal. The current source sinks a fixed current from the 1st and 2nd input transistors and the complimentary transistor. The 1st load is operably coupled to the drains of the 1st and 2nd input transistors to provide a 1st phase of a differential logic output.