Patents by Inventor Tsung Ta Tsai

Tsung Ta Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145878
    Abstract: An electrode structure of rechargeable battery includes a battery tab stack, an electrode lead, a welding protective layer and a welding seam. The battery tab stack is formed by extension of a plurality of electrode sheets. The electrode lead is joined to one side of the battery tab stack. The welding protective layer is joined to another side of the battery tab stack opposite to the electrode lead. The welding seam extends from the welding protective layer to the electrode lead through the battery tab stack.
    Type: Application
    Filed: November 29, 2022
    Publication date: May 2, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kun-Tso CHEN, Tsung-Ying TSAI, Tsai-Chun LEE, Chih-Wei CHIEN, Hui-Ta CHENG
  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Patent number: 11693973
    Abstract: A file vulnerability detection method includes: translating a binary file into an intermediate file; analyzing the intermediate file to obtain multiple functions to be tested; establishing function characteristic data of each of the functions to be tested; and comparing correlations between the function characteristic data of each of the functions to be tested and at least one pair of characteristic data with vulnerability of at least one vulnerability function and characteristic data without vulnerability of the at least one vulnerability function in a vulnerability database based on a characteristic model to determine whether each of the functions to be tested corresponding to each function characteristic data has a vulnerability, wherein the characteristic model has information representing multiple back-end binary files generated by multiple back-end platforms, wherein the characteristic data with vulnerability has the vulnerability, and the characteristic data without vulnerability does not have the vuln
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: July 4, 2023
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Jian Wei Liao, Chihwei Chen, Chin Wei Tien, Tsung Ta Tsai
  • Publication number: 20220269793
    Abstract: A file vulnerability detection method includes: translating a binary file into an intermediate file; analyzing the intermediate file to obtain multiple functions to be tested; establishing function characteristic data of each of the functions to be tested; and comparing correlations between the function characteristic data of each of the functions to be tested and at least one pair of characteristic data with vulnerability of at least one vulnerability function and characteristic data without vulnerability of the at least one vulnerability function in a vulnerability database based on a characteristic model to determine whether each of the functions to be tested corresponding to each function characteristic data has a vulnerability, wherein the characteristic model has information representing multiple back-end binary files generated by multiple back-end platforms, wherein the characteristic data with vulnerability has the vulnerability, and the characteristic data without vulnerability does not have the vuln
    Type: Application
    Filed: March 19, 2021
    Publication date: August 25, 2022
    Inventors: Jian Wei Liao, Chihwei Chen, CHIN WEI TIEN, Tsung Ta Tsai
  • Patent number: 11397664
    Abstract: A system for producing test data produces fuzzing data at least according to first test data which is used for testing at least one first device and second test data which is used for testing a second device. Then, the system transmits the fuzzing data to the second device so as to test the second device.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: July 26, 2022
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Pei-Yi Lin, Ting-Chun Huang, Tsung-Ta Tsai, Chia-Wei Tien
  • Publication number: 20210141715
    Abstract: A system for producing test data produces fuzzing data at least according to first test data which is used for testing at least one first device and second test data which is used for testing a second device. Then, the system transmits the fuzzing data to the second device so as to test the second device.
    Type: Application
    Filed: November 29, 2019
    Publication date: May 13, 2021
    Inventors: Pei-Yi LIN, Ting-Chun HUANG, Tsung-Ta TSAI, Chia-Wei TIEN
  • Patent number: 7443268
    Abstract: A compact bandpass filter within a multilayered low temperature co-fired ceramic (LTCC) substrate is provided. Each resonator comprises an inductor and a capacitor connected in parallel. A top ceramic substrate comprises a top conductive plate to form a first RF ground plane. A bottom ceramic substrate comprises a bottom conductive plate to form a second RF ground plane. A first ceramic substrate is between the top and bottom ceramic substrates. All inductors of the resonators are serpentine conductive traces on the first ceramic substrate. A second ceramic substrate is between the first and bottom ceramic substrates, having a plurality of conductive plates to form a plurality of capacitors that transmit RF signal from an input node of the bandpass filter to an output node of the bandpass filter. The resonators are located between the too and bottom conductive plates.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: October 28, 2008
    Assignee: Darfon Electronics Corp.
    Inventors: Tsung-Ta Tsai, Jun-Zhe Huang
  • Patent number: 7196595
    Abstract: A multilayer diplexer has a first I/O terminal, a second I/O terminal, an antenna terminal, a high-pass filter coupled between the antenna terminal and the second I/O terminal, and a low-pass filter coupled between the antenna terminal and the first I/O terminal. The high-pass filter has a first capacitor and a second capacitor connected in serial coupled between the antenna terminal and the second I/O terminal, a fourth capacitor coupled between the antenna terminal and the second I/O terminal, and a first inductor coupled between a connection node of the first and second capacitors and a reference ground. The low-pass filter has a second inductor coupled between the antenna terminal and the first I/O terminal, and a third and fifth capacitor connected in parallel coupled between the antenna terminal and the first I/O terminal.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: March 27, 2007
    Assignee: Darfon Electronics Corp.
    Inventors: Chieh Yu Tsai, Tsung Ta Tsai
  • Publication number: 20060197203
    Abstract: A die structure of a package is provided. The die structure of the package includes a carrier and a die. The die includes a first portion and a second portion. The top surface of the first portion is an active surface. The second portion is configured below the first portion. A first width of the first portion is smaller than a second width of the second portion. And the second portion of the die is adhered to the carrier.
    Type: Application
    Filed: December 30, 2005
    Publication date: September 7, 2006
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ching-Sung Chu, Tsung-Ta Tsai, Ming-Yu Huang
  • Publication number: 20060043580
    Abstract: A compact bandpass filter within a multilayered low temperature co-fired ceramic (LTCC) substrate is provided. Each resonator comprises an inductor and a capacitor connected in parallel. A top ceramic substrate comprises a top conductive plate to form a first RF ground plane. A bottom ceramic substrate comprises a bottom conductive plate to form a second RF ground plane. A first ceramic substrate is between the top and bottom ceramic substrates. All inductors of the resonators are serpentine conductive traces on the first ceramic substrate. A second ceramic substrate is between the first and bottom ceramic substrates, having a plurality of conductive plates to form a plurality of capacitors that transmit RF signal from an input node of the bandpass filter to an output node of the bandpass filter. The resonators are located between the too and bottom conductive plates.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 2, 2006
    Inventors: Tsung-Ta Tsai, Jun-Zhe Huang