Patents by Inventor Tsutomu Udo

Tsutomu Udo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6933201
    Abstract: Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: August 23, 2005
    Assignees: Hitachi, Ltd., Hitachi ULSI Sytems Co., Ltd.
    Inventors: Tatsuya Tominari, Takashi Hashimoto, Tomoko Jinbo, Tsutomu Udo
  • Patent number: 6905934
    Abstract: The invention provides a bipolar transistor with improved performance. An insulation film comprising a silicon oxide film is formed by means of oxidation treatment on the side surface of an emitter aperture, and then an epitaxial layer comprised of SiGe is grown selectively in an aperture formed by removing a silicon nitride film so as to form under cut.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: June 14, 2005
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Takashi Hashimoto, Kouji Mikami, Tsutomu Udo, Masao Kondo, Eiji Oue
  • Publication number: 20030157774
    Abstract: Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.
    Type: Application
    Filed: January 21, 2003
    Publication date: August 21, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Tatsuya Tominari, Takashi Hashimoto, Tomoko Jinbo, Tsutomu Udo
  • Publication number: 20020142557
    Abstract: The invention provides a bipolar transistor with improved performance. An insulation film comprising a silicon oxide film is formed by means of oxidation treatment on the side surface of an emitter aperture, and then an epitaxial layer comprised of SiGe is grown selectively in an aperture formed by removing a silicon nitride film so as to form under cut.
    Type: Application
    Filed: March 4, 2002
    Publication date: October 3, 2002
    Inventors: Takashi Hashimoto, Kouji Mikami, Tsutomu Udo, Masao Kondo, Eiji Oue