Patents by Inventor Tsuyoshi Aso

Tsuyoshi Aso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8574447
    Abstract: A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of cycles, wherein each cycle comprises a sidewall deposition phase and an etch phase. The sidewall deposition phase comprises providing a flow of sidewall inorganic deposition phase gas comprising a silicon containing compound gas and at least one of oxygen, nitrogen or NOx, into the plasma processing chamber, forming a plasma from the sidewall deposition phase gas in the plasma processing chamber, and stopping the flow of the sidewall deposition gas into the plasma processing chamber. The etch phase comprises, providing a flow of an etching gas comprising a halogen component, forming a plasma from the etching gas in the plasma processing chamber, and stopping the flow of the etching gas.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: November 5, 2013
    Assignee: Lam Research Corporation
    Inventors: Tsuyoshi Aso, Camelia Rusu
  • Publication number: 20110244686
    Abstract: A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of cycles, wherein each cycle comprises a sidewall deposition phase and an etch phase. The sidewall deposition phase comprises providing a flow of sidewall inorganic deposition phase gas comprising a silicon containing compound gas and at least one of oxygen, nitrogen or NOx, into the plasma processing chamber, forming a plasma from the sidewall deposition phase gas in the plasma processing chamber, and stopping the flow of the sidewall deposition gas into the plasma processing chamber. The etch phase comprises, providing a flow of an etching gas comprising a halogen component, forming a plasma from the etching gas in the plasma processing chamber, and stopping the flow of the etching gas.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Applicant: Lam Research Corporation
    Inventors: Tsuyoshi Aso, Camelia Rusu
  • Patent number: 7226869
    Abstract: Methods for forming a protective polymeric coating on a silicon or silicon-carbide electrode of a plasma processing chamber are provided. The polymeric coating provides protection to the underlying surface of the electrode with respect to exposure to constituents of plasma and gaseous reactants. The methods can be performed during a process of cleaning the chamber, or during a process for etching a semiconductor substrate in the chamber.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: June 5, 2007
    Assignee: Lam Research Corporation
    Inventors: Kenji Takeshita, Tsuyoshi Aso, Seiji Kawaguchi, Thomas McClard, Wan-Lin Chen, Enrico Magni, Michael Kelly, Michelle Lupan, Robert Hefty
  • Publication number: 20060091104
    Abstract: Methods for forming a protective polymeric coating on a silicon or silicon-carbide electrode of a plasma processing chamber are provided. The polymeric coating provides protection to the underlying surface of the electrode with respect to exposure to constituents of plasma and gaseous reactants. The methods can be performed during a process of cleaning the chamber, or during a process for etching a semiconductor substrate in the chamber.
    Type: Application
    Filed: October 29, 2004
    Publication date: May 4, 2006
    Inventors: Kenji Takeshita, Tsuyoshi Aso, Seiji Kawaguchi, Thomas McClard, Wan-Lin Chen, Enrico Magni, Michael Kelly, Michelle Lupan, Robert Hefty
  • Patent number: 5151768
    Abstract: A dielectric isolation substrate includes island-like regions made of a single crystal of semiconductor material and a supporting layer for supporting the island-like regions. The support layer is formed by first and second electrodes made of a conductive material and a dielectric film interposed therebetween to constitute a capacitor structure. The first electrode layer has a plurality of island-like regions on a principal surface side thereof remote from the dielectric film. The first electrode layer may be formed as one region for forming one capacitor or isolated two or more regions for forming two or more capacitors.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: September 29, 1992
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tsuyoshi Aso