Abstract: Electrons are prevented from being made incident onto an insulation part of a casing between dynodes to improve a withstand voltage.

Abstract: Electrons are prevented from being made incident onto an insulation part between dynodes to improve a withstand voltage.

Abstract: A semiconductor memory is provided which includes a word line coupled to a transistor of a memory cell; a word driver configured to activate the word line; a first resistance portion configured to couple the word line to a low-level voltage line in accordance with an activation of the word line and to decouple the coupling after a first period in an activation period of the word line elapses; a second resistance portion configured to couple the word line to a high-level voltage line in a second period in the activation period; and a third resistance portion configured to couple the word line to the low-level voltage line in the second period, a resistance of the third resistance portion being higher than a resistance of the first resistance portion, wherein a high-level voltage of the word line in the second period is lower than that of the high-level voltage line.

Abstract: A tablet supply unit 2 of a medicine packing apparatus 1 has a tablet housing section 22c constructed from tablet housing chambers 22 for respectively housing the tablets for one dose fed from upper end openings thereof. The tablet housing chambers 22 are arranged in a plurality of rows in an anteroposterior direction and a plurality of columns in a lateral direction. A closing cover 25 opens upper end openings 21a of all of the tablet housing chambers 21 at an open position and closes the upper end openings 21a in one or more rows of the tablet housing chambers on a rear side among the tablet housing chambers at a closed position.

Abstract: The present invention relates to a photomultiplier that realizes a significant improvement of response time characteristics by a structure enabling mass production. The photomultiplier comprises a sealed container, and, in the sealed container, a photocathode, an electron multiplier section, and an anode are respectively disposed. The electron multiplier section includes multiple stages of dynode units, and each of the multiple stages of dynode units is fixed with one end of the associated dynode pin while being electrically connected thereto. In particular, the dynode pin, whose one ends are fixed to the multiple stages of dynode units, are held within an effective region of the electron multiplier section contributing to secondary electron multiplication, when the electron multiplier section is viewed from the photocathode side.

Abstract: A semiconductor storage device comprising a plurality of memory cells disposed in an array in the row and column directions and a bit line extending in the column direction of the memory cell or a word line extending in its row direction, which is disconnected in the middle of the array.

Abstract: A tablet packing apparatus having a tablet feeding section and storage shelves for storing tablet vessels in which tablets fed from the tablet feeding section are packed. The storage shelves include a plurality of container chambers in which the tablet vessels which the tablet fed from the tablet feeding section are inserted; and a vessel holder for hanging and holding the tablet vessel. The vessel holder is provided at an upper portion inside each of the plurality of container chambers. The vessel holder includes a pair of holding members that are opposed to each other in a horizontal direction; and holding lugs formed at the lower ends of the holding members. The holding lugs extend in a direction in which the holding plates are opposed.

Abstract: The present invention is a semiconductor storage device comprising a plurality of memory cells disposed in an array in the row and column directions and a bit line extending in the column direction of the memory cell or a word line extending in its row direction, which is disconnected in the middle of the array.

Abstract: A semiconductor memory device for suitably controlling the timing for accessing data in a memory cell. The semiconductor memory device includes a memory cell. A bit line, connected to the memory cell, is used to access data stored in the memory cell. A first path for generating a first timing signal includes a dummy cell for storing data. A dummy bit line, connected to the dummy cell, is used to access the data stored in the dummy cell. A second path for generating a second timing signal has a delay characteristic differing from that of the first path. A control circuit controls the timing for accessing the data stored in the memory cells using one of the first timing signal and the second timing signal.

Abstract: A semiconductor memory in which a drop in the potential of a bit line due to coupling capacitance at the time of writing data can be restored in a space-saving way without increasing a load at read time. In response to a selection signal, a selection circuit selects complementary bit lines and connects the selected complementary bit lines to write data bus lines or read data bus lines. When data is written, a voltage boosting circuit section selects a read data bus line connected to a bit line of the pair of complementary bit lines located opposite to a bit line the potential of which is decreased on the basis of the data to be written and raises the potential of the selected read data bus line. As a result, a potential level which has dropped due to coupling capacitance between the bit lines can be restored.

Abstract: A tablet packing apparatus in which there is no risk that next tablets will be mixed into tablets previously discharged. The packing apparatus includes a plurality of feeder vessels (36) containing the tablets, a plurality of mounting bases (32) on which respective feeder vessels 36 are mounted, and a tablet reserving member (200) disposed below the mounting base 32 and reserving the tablets fed from the feeder vessels (36) and a shutter (203,300) which is movable to open and close the lower opening of the tablet reserving member (200). The apparatus further comprises a LED (201) which is turned on when the tablets are fed to the tablet reserving member (200) and a sensor (206, 301a, 301b) for detecting opening or closing operation of the shutter (203), whereby when the sensor (206, 301a, 301b) detects the opening operation of the shutter (203,300), the LED (201) is turned off.

Abstract: A tablet packing apparatus in which there is no risk that next tablets will be mixed into tablets previously discharged. The packing apparatus includes a plurality of feeder vessels (36) containing the tablets, a plurality of mounting bases (32) on which respective feeder vessels (36) are mounted, and a tablet reserving member (200) disposed below the mounting base (32) and reserving the tablets fed from the feeder vessels (36) and a shutter (203,300) which is movable to open and close the lower opening of the tablet reserving member (200). The apparatus further comprises a LED (201) which is turned on when the tablets are fed to the tablet reserving member (200) and a sensor (206, 301a, 301b) for detecting opening or closing operation of the shutter (203), whereby when the sensor (206, 301a, 301b) detects the opening operation of the shutter (203,300), the LED (201) is turned off.

Abstract: A semiconductor memory in which a drop in the potential of a bit line due to coupling capacitance at the time of writing data can be restored in a space-saving way without increasing a load at read time. In response to a selection signal, a selection circuit selects complementary bit lines and connects the selected complementary bit lines to write data bus lines or read data bus lines. When data is written, a voltage boosting circuit section selects a read data bus line connected to a bit line of the pair of complementary bit lines located opposite to a bit line the potential of which is decreased on the basis of the data to be written and raises the potential of the selected read data bus line. As a result, a potential level which has dropped due to coupling capacitance between the bit lines can be restored.

Abstract: A semiconductor memory device that quickly precharges a bit line and shortens the cycle time for accessing the memory cells. The semiconductor memory device includes a memory cell array having a plurality of memory cells. A bit line is connected to the plurality of memory cells. A plurality of precharge circuits are connected to the bit line to precharge the bit line to a predetermined potential. A timing control circuit generates a timing signal. The precharge control circuit controls the precharge circuits in response to the timing signal such that the precharge circuits are activated sequentially from the one farthest from the timing control circuit to the one closest to the timing control circuit.

Abstract: On each of a plurality of disposed racks, an injection drug storing container is each detachably mounted. The injection drug storing container includes a transportation device for transporting a stored injection drug in one direction. The injection drug transported by the transportation device is housed in each housing portion formed on a circumferential portion of a rotating body one by one. The injection drug in each housing portion is sequentially delivered one by one by rotation of the rotating body.

Abstract: A semiconductor memory device that quickly precharges a bit line and shortens the cycle time for accessing the memory cells. The semiconductor memory device includes a memory cell array having a plurality of memory cells. A bit line is connected to the plurality of memory cells. A plurality of precharge circuits are connected to the bit line to precharge the bit line to a predetermined potential. A timing control circuit generates a timing signal. The precharge control circuit controls the precharge circuits in response to the timing signal such that the precharge circuits are activated sequentially from the one farthest from the timing control circuit to the one closest to the timing control circuit.

Abstract: A semiconductor memory device for suitably controlling the timing for accessing data in a memory cell. The semiconductor memory device includes a memory cell. A bit line, connected to the memory cell, is used to access data stored in the memory cell. A first path for generating a first timing signal includes a dummy cell for storing data. A dummy bit line, connected to the dummy cell, is used to access the data stored in the dummy cell. A second path for generating a second timing signal has a delay characteristic differing from that of the first path. A control circuit controls the timing for accessing the data stored in the memory cells using one of the first timing signal and the second timing signal.

Abstract: A semiconductor memory device includes a bit line to be coupled to a memory cell, a data-bus line, a gate situated between the bit line and the data-bus line to control a coupling between the bit line and the data-bus line, and a signal generating circuit configured to generate at least one signal for controlling opening/closing of the gate in response to data that is to be stored in the memory cell.

Abstract: In a casing, a grasp means and a movement means are provided. The movement means is driven and controlled by a control means with a container box being positioned in a specified position based on coordinate data of an injection drug housing member preinstalled in a coordinate data table for moving the injection drug housing member to a graspable position by the grasp means. Next, after grasped by the grasp means, the injection drug housing member is automatically transported to a desired position.

Abstract: An ampoule storage container 1 stores a plurality of ampoules 2 in a laterally orientated state with respect to a discharge direction. A belt conveyor 5 is disposed at the bottom of the ampoule storage container 1 so that the ampoule 2 can be conveyed in the laterally orientated state. An ampoule regulating member 10 is disposed above the belt 6 of the belt conveyor 5 to form a gap through which only one of the ampoule 2 can pass. A stopper 13 which comes into contact with the one end of the ampoule 2 passing through the gap is provided so that the ampoule 2 can be changed to a longitudinally orientated state. According to the present invention, the direction of the ampoule 2 can be changed and a desired number of ampoules 2 can be discharged one by one in spite of simple construction.