Patents by Inventor Tsuyoshi Morisada

Tsuyoshi Morisada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11993849
    Abstract: According to one embodiment, there is provided a carbon hard mask laminated on an etching target film, in which the concentration ratio of a methylene group CH2 and a methyl group CH3 contained in the carbon hard mask satisfies the expression CH2/(CH2+CH3)?0.5.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: May 28, 2024
    Assignees: TOKYO ELECTRON LIMITED, National University Corporation Tokai National Higher Education and Research System
    Inventors: Masaru Hori, Makoto Sekine, Hirotsugu Sugiura, Tsuyoshi Moriya, Satoshi Tanaka, Yoshinori Morisada
  • Patent number: 5345571
    Abstract: A system for controlling a branch history table in a data processing apparatus which has a memory for storing a branch instruction address and a branch destination address corresponding to the branch instruction in a one-to-one correspondence as the branch history table and which employs a virtual storage scheme includes a first register, a second register, a comparator, and a controller. The first register stores the branch instruction address including a virtual space number. The second register stores the branch destination address including the branch virtual space number. The comparator compares the virtual space numbers stored in the first and second registers. The controller enables storage of the branch history table in the memory when a coincidence is established as a result of comparison.
    Type: Grant
    Filed: August 5, 1993
    Date of Patent: September 6, 1994
    Assignee: NEC Corporation
    Inventor: Tsuyoshi Morisada
  • Patent number: 5317702
    Abstract: For use in an instruction prefetching system for carrying out instruction prefetch in a data processing system in controlling a branch history table responsive to an instruction request address for producing a historical branch instruction address and a corresponding branch destination address, a device uses a detect mode which is determined by the prefetching system to indicate whether the branch destination address should or should not be used in the instruction prefetch. When the historical branch instruction address is retrieved from the table and furthermore when the branch destination address should be used, the branch destination address is actually used in the instruction prefetch. When the historical branch instruction address is retrieved and furthermore when the branch destination address should not be used, a signal is produced to indicate that the historical branch instruction address is found. In this event, the device does not send the branch destination address to the prefetching system.
    Type: Grant
    Filed: May 24, 1990
    Date of Patent: May 31, 1994
    Assignee: NEC Corporation
    Inventor: Tsuyoshi Morisada
  • Patent number: 5175827
    Abstract: A system for executing computer instructions, having an improved branch history table. The system writes both branch instruction addresses and branch destination addresses into the branch history table on the basis of the result of an execution of a branch instruction. The system recognizes repeated execution of a series of instructions or that "looping" is occurring. The system then during "looping" allows writing into the branch history table only the first time and prevents continuous writing during looping.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: December 29, 1992
    Assignee: NEC Corporation
    Inventor: Tsuyoshi Morisada
  • Patent number: 4881170
    Abstract: An information processing system for performing a prior control in determining a branch destination address by an execution of a branch instruction, includes a branch history table for storing prior branch destination address due to the fact that the possibility of branching to the prior branch destination address is high. By storing, in the branch history table, the branch destination address together with residual instruction number from the branch destination address to segment boundary, it is possible to restrict an instruction prefetch beyond the boundary area of a main memory to thereby prevent an excessive request from being produced. By storing, in the branch history table, the branch destination address together with mode information, it is possible to prevent an access to the main memory in a different mode from that at an instruction prefetch from occurring.
    Type: Grant
    Filed: October 23, 1987
    Date of Patent: November 14, 1989
    Assignee: NEC Corporation
    Inventor: Tsuyoshi Morisada