Patents by Inventor Tumay Kanar

Tumay Kanar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106469
    Abstract: Methods and systems for operating a transceiver are described. A transceiver can include an upconverting mixer, a downconverting mixer, a controller, and an envelope detector. The upconverting mixer can mix an input signal with a local oscillator (LO) signal to generate a transmitter signal. The envelope detector can receive the transmitter signal outputted from the upconverting mixer and output an envelope of the transmitter signal to an output line of the downconverting mixer. The envelope can indicate at least one of a leaked LO signal and an image signal. The controller can receive a calibration parameter that is based on at least one of the leaked LO signal and image signal and calibrate the upconverting mixer based on the calibration parameter.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Applicant: Renesas Electronics America Inc.
    Inventors: Himanshu Khatri, Samet Zihir, Tumay Kanar
  • Patent number: 11824273
    Abstract: An apparatus includes a plurality of transceiver circuits, each comprising one or more phase shifter circuits. The phase shifter circuits may be configured to make a phase change by switching at least one of a capacitance value and an inductance value in response to a control signal. A characteristic impedance and the phase of each phase shifter circuit are correlated such that after the phase change, a value of the characteristic impedance is maintained at a predefined value.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: November 21, 2023
    Assignee: Renesas Electronics America Inc.
    Inventors: Morteza Abbasi, Tumay Kanar, Naveen Krishna Yanduru
  • Publication number: 20220399642
    Abstract: Methods and apparatuses for signal attenuation is described. In an example, an attenuator can be configured to perform attenuation of signals for an integrated circuit. The attenuator can vary the attenuation with an ambient temperature. The attenuator can further adjust the attenuation based on a control signal applied to the attenuator. The control signal can be based on one or more of a temperature profile of the attenuator and a target gain variation of the integrated circuit.
    Type: Application
    Filed: June 11, 2021
    Publication date: December 15, 2022
    Applicant: Renesas Electronics America Inc.
    Inventors: Mohammad GHADIRI SADRABADI, Tumay KANAR
  • Publication number: 20220085767
    Abstract: An apparatus includes an amplifier circuit including a first transistor and a second transistor. The first transistor may include a gate having a gate oxide with a first thickness and a first gate length. The second transistor may include a gate having a gate oxide with a second thickness and a second gate length. The first transistor and the second transistor may be connected in a cascode configuration and the second thickness and the second gate length are greater than the first thickness and the first gate length, respectively.
    Type: Application
    Filed: August 19, 2021
    Publication date: March 17, 2022
    Applicant: Renesas Electronics America Inc.
    Inventors: Morteza Abbasi, Tumay KANAR, Naveen Krishna Yanduru
  • Patent number: 11171427
    Abstract: An apparatus includes a package and a beam former circuit. The package may be configured to be mounted on an antenna array at a center of four antenna elements. Each antenna element may include a dual-pole antenna having a vertical feed and a horizontal feed. The beam former circuit may be (i) disposed in the package, (ii) have a plurality of pairs of ports, (iii) configured to generate a plurality of radio-frequency signals in the ports while in a transmit mode and (iv) configured to receive the radio-frequency signals at the ports while in a receive mode. Each pair of the ports is configured to be directly connected to a respective one of the antenna elements. All of the ports may be spatially routed into alignment with the vertical feeds and the horizontal feeds in a single conductive plane of the antenna array.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: November 9, 2021
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar
  • Patent number: 11171418
    Abstract: An apparatus includes a phased array antenna panel and one or more dual-polarization beam former circuits mounted on the phased array antenna panel. The phased array antenna panel generally comprises a plurality of dual-polarization antenna elements. The plurality of dual-polarization antenna elements are generally arranged in one or more groups. Each dual-polarization beam former circuit may be coupled to a respective group of the dual-polarization antenna elements. Each dual-polarization beam former circuit generally comprises a plurality of transceiver channels. Each transceiver channel generally comprises a horizontal channel and a vertical channel. Each dual-polarization beam former circuit provides polarization rotation through bias current control in each of the vertical and horizontal channels.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: November 9, 2021
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar
  • Patent number: 11128327
    Abstract: An apparatus includes a transceiver circuit, a series capacitor, and a shunt switch. The transceiver circuit may comprise a transmit chain including an output matching network and a receive chain including an input matching network. An output of the output matching network may be connected directly to an input/output of the transceiver circuit. The series capacitor may be connected between an input of the input matching network and the output of the output matching network. The shunt switch may be connected between the input of the input matching network and a circuit ground potential of the transceiver circuit.
    Type: Grant
    Filed: August 31, 2019
    Date of Patent: September 21, 2021
    Assignee: Integrated Device Technology, Inc.
    Inventors: Morteza Abbasi, Tumay Kanar, Naveen Krishna Yanduru
  • Patent number: 11043753
    Abstract: An apparatus includes a phased array antenna panel and one or more beam former circuits mounted on the phased array antenna panel. The phased array antenna panel generally comprises a plurality of antenna elements. The plurality of antenna elements are generally arranged in one or more groups. Each beam former circuit may be coupled to a respective group of the antenna elements. Each beam former circuit generally comprises a plurality of transceiver channels. Each transceiver channel generally comprises a power amplifier circuit configured, when operating in a transmit mode, to drive a respective one of the antenna elements. The power amplifier circuit generally comprises separate bias and voltage supply inputs providing additional power control.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: June 22, 2021
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar
  • Publication number: 20210151878
    Abstract: An apparatus includes a plurality of transceiver circuits, each comprising one or more phase shifter circuits. The phase shifter circuits may be configured to make a phase change by switching at least one of a capacitance value and an inductance value in response to a control signal. A characteristic impedance and the phase of each phase shifter circuit are correlated such that after the phase change, a value of the characteristic impedance is maintained at a predefined value.
    Type: Application
    Filed: November 14, 2019
    Publication date: May 20, 2021
    Inventors: Morteza Abbasi, Tumay Kanar, Naveen Krishna Yanduru
  • Patent number: 10998931
    Abstract: An apparatus includes a transmit-receive switch circuit and a detector circuit. The transmit-receive switch circuit may be connected between an input port, an output port, and a common port, and configured to switch a transmit radio-frequency signal from the input port to the common port in a transmit mode and a receive radio-frequency signal from the common port to the output port in a receive mode. The detector circuit may be integrated within the transmit-receive switch and may be configured to generate a power detection signal in response to at least one of the transmit radio-frequency signal or the receive radio-frequency signal.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: May 4, 2021
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar, Himanshu Khatri
  • Publication number: 20210067183
    Abstract: An apparatus includes a transceiver circuit, a series capacitor, and a shunt switch. The transceiver circuit may comprise a transmit chain including an output matching network and a receive chain including an input matching network. An output of the output matching network may be connected directly to an input/output of the transceiver circuit. The series capacitor may be connected between an input of the input matching network and the output of the output matching network. The shunt switch may be connected between the input of the input matching network and a circuit ground potential of the transceiver circuit.
    Type: Application
    Filed: August 31, 2019
    Publication date: March 4, 2021
    Inventors: Morteza Abbasi, Tumay Kanar, Naveen Krishna Yanduru
  • Patent number: 10879623
    Abstract: An apparatus includes a plurality of transmitter channels and a plurality of feedback networks. Each of the plurality of transmitter channels may be coupled to a respective antenna element in a respective group of antenna elements of a phased array antenna. Each of the transmitter channels generally comprises a power amplifier circuit configured to drive the respective antenna element in the respective group of antenna elements to produce and steer a radio-frequency beam. Each of the plurality of feedback networks may be coupled between an output and an input of a respective power amplifier circuit of a respective transmitter channel. Each of the feedback networks generally comprises a resistor and a capacitor connected in series. The respective power amplifier circuit with the feedback network generally maintains a power matching condition with load variation associated with performing beam steering of the radio-frequency beam using the antenna elements of the phased array antenna.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: December 29, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar
  • Patent number: 10804858
    Abstract: An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: October 13, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Himanshu Khatri, Tumay Kanar
  • Patent number: 10790594
    Abstract: An apparatus includes a first circuit and a plurality of second circuits. The first circuit may be configured to generate a pair of quadrature signals from a radio-frequency signal. The second circuits may each comprise a plurality of cascode amplifiers. The cascode amplifiers may be connected in parallel. The cascode amplifiers may be configured to generate a plurality of intermediate signals by modulating the quadrature signals in response to a first control signal and a second control signal. The first control signal generally switches a contribution of the cascode amplifiers in the generation of the intermediate signal. The second control signal may adjusts a total current passing through all of the cascode amplifiers.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: September 29, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tumay Kanar, Samet Zihir, Naveen Krishna Yanduru
  • Publication number: 20200295798
    Abstract: An apparatus includes a transmit-receive switch circuit and a detector circuit. The transmit-receive switch circuit may be connected between an input port, an output port, and a common port, and configured to switch a transmit radio-frequency signal from the input port to the common port in a transmit mode and a receive radio-frequency signal from the common port to the output port in a receive mode. The detector circuit may be integrated within the transmit-receive switch and may be configured to generate a power detection signal in response to at least one of the transmit radio-frequency signal or the receive radio-frequency signal.
    Type: Application
    Filed: January 8, 2020
    Publication date: September 17, 2020
    Inventors: Samet Zihir, Tumay Kanar, Himanshu Khatri
  • Patent number: 10763913
    Abstract: An apparatus includes a log amplifier and a calibration circuit. The log amplifier may be configured to generate an output signal in response to an offset between a first voltage and a second voltage. The calibration circuit may be configured to disconnect an input power and perform a cancellation of the offset when the input power is not present. The first voltage may be generated by the apparatus in response to a power detection. The second voltage may be received from a reference circuit. The cancellation of the offset may extend a working range of the apparatus. The output may provide a linear-in-dB power detection.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 1, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Himanshu Khatri, Samet Zihir, Tumay Kanar
  • Patent number: 10756442
    Abstract: An apparatus includes a package and a beam former circuit. The package may be configured to be mounted on an antenna array at a center of four antenna elements. The beam former circuit may (i) be disposed in the package, (ii) have a plurality of ports, (iii) be configured to generate a plurality of radio-frequency signals in the ports while in a transmit mode and (iv) be configured to receive the radio-frequency signals at the ports while in a receive mode. A plurality of ground bumps may be disposed between the beam former circuit and the package. The ground bumps may be positioned to bracket each port. Each ground bump may be electrically connected to a signal ground to create a radio-frequency shielding between neighboring ports.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: August 25, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tumay Kanar, Chih-Hsiang Ko, Samet Zihir
  • Publication number: 20200244228
    Abstract: An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 30, 2020
    Inventors: Samet Zihir, Himanshu Khatri, Tumay Kanar
  • Patent number: 10720985
    Abstract: An apparatus comprises a phased array antenna panel, a plurality of amplifier circuits, and a plurality of beamformer circuits. The phased array antenna panel generally comprises a plurality of antenna elements. Each of the amplifier circuits is mounted on the phased array antenna panel adjacent to a respective one of the plurality of antenna elements and each of the amplifier circuits has one or more first ports directly coupled to the respective antenna element. Each of the beamformer circuits is mounted on the phased array antenna panel adjacent to a number of the amplifier circuits. Each of the beamformer circuits has one or more second ports directly coupled to each of the adjacent amplifier circuits. Each of the beamformer circuits is generally configured to exchange a plurality of radio-frequency signals with each of the adjacent amplifier circuits via the second ports.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: July 21, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tumay Kanar, Chih-Hsiang Ko
  • Patent number: 10686258
    Abstract: An apparatus includes a phased array antenna panel and a plurality of beam former circuits. The phased array antenna panel generally comprises a plurality of antenna elements. The plurality of beam former circuits are each mounted on the phased array antenna panel adjacent to a number of the antenna elements. Each beam former circuit has one or more ports directly coupled to each of the adjacent antenna elements. Each beam former circuit may be configured to generate a plurality of radio-frequency output signals at the ports while in a transmit mode and receive a plurality of radio-frequency input signals at the ports while in a receive mode. Each beam former circuit generally implements a hard-wired address.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: June 16, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Samet Zihir, Tumay Kanar, Naveen Krishna Yanduru