Patents by Inventor Twila J. Eichman

Twila J. Eichman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9111937
    Abstract: Semiconductor devices with multilayer flex interconnect structures. In some embodiments, a semiconductor device may include a semiconductor chip coupled to a planar substrate and a multilayer flex interconnect structure coupled to the semiconductor chip, the multilayer flex interconnect structure including at least: a first conductive layer, a second conductive layer, and a dielectric layer disposed between the first and second conductive layers. The semiconductor device may also include another semiconductor chip coupled to the planar substrate and placed in a side-by-side configuration with respect to the semiconductor chip, where the multilayer flex interconnect structure provides electrical connections between at least two terminals of the semiconductor chip and at least two terminals of the other semiconductor chip.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: August 18, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Burton J. Carpenter, Jr., Twila J. Eichman
  • Publication number: 20140353830
    Abstract: Semiconductor devices with multilayer flex interconnect structures. In some embodiments, a semiconductor device may include a semiconductor chip coupled to a planar substrate and a multilayer flex interconnect structure coupled to the semiconductor chip, the multilayer flex interconnect structure including at least: a first conductive layer, a second conductive layer, and a dielectric layer disposed between the first and second conductive layers. The semiconductor device may also include another semiconductor chip coupled to the planar substrate and placed in a side-by-side configuration with respect to the semiconductor chip, where the multilayer flex interconnect structure provides electrical connections between at least two terminals of the semiconductor chip and at least two terminals of the other semiconductor chip.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 4, 2014
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Burton J. Carpenter, Jr., Twila J. Eichman