Patents by Inventor Tzachi Cohen

Tzachi Cohen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11714653
    Abstract: A method for computing includes defining a processing pipeline, including at least a first stage in which producer processors compute and output data to respective locations in a buffer and a second processing stage in which one or more consumer processors read the data from the buffer and apply a computational task to the data read from the buffer. The computational task is broken into multiple, independent work units, for application by the consumer processors to respective ranges of the data in the buffer, and respective indexes are assigned to the work units in a predefined index space. A mapping is generated between the index space and the addresses in the buffer, and execution of the work units is scheduled such that at least one of the work units can begin execution before all the producer processors have completed the first processing stage.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: August 1, 2023
    Assignee: HABANA LABS LTD.
    Inventors: Tzachi Cohen, Michael Zuckerman, Doron Singer, Ron Shalev, Amos Goldman
  • Patent number: 11467827
    Abstract: A method for computing includes providing software source code defining a processing pipeline including multiple, sequential stages of parallel computations, in which a plurality of processors apply a computational task to data read from a buffer. A static code analysis is applied to the software source code so as to break the computational task into multiple, independent work units, and to define an index space in which the work units are identified by respective indexes. Based on the static code analysis, mapping parameters that define a mapping between the index space and addresses in the buffer are computed, indicating by the mapping the respective ranges of the data to which the work units are to be applied. The source code is compiled so that the processors execute the work units identified by the respective indexes while accessing the data in the buffer in accordance with the mapping.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: October 11, 2022
    Assignee: HABANA LABS LTD.
    Inventors: Michael Zuckerman, Tzachi Cohen, Doron Singer, Ron Shalev, Amos Goldman
  • Publication number: 20170178275
    Abstract: Described is a method and system for using a solid state device (SSD) as an eviction pad for graphics processing units (GPUs). The method for eviction processing includes a processor that determines when a dedicated memory associated with a GPU and a host memory associated with the processor are congested. The processor sends a content transfer command to the SSD. The SSD initiates a content transfer directly with the dedicated memory associated with the GPU. The GPU transfers the contents directly to the SSD. The processor sends a content transfer command to the SSD when the evicted contents are needed by the GPU. The SSD then initiates and transfers the evicted contents back to the dedicated memory.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Tzachi Cohen, Yaki Tebeka, Assaf Pagi