Patents by Inventor Tzu-Chao Lin

Tzu-Chao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7636018
    Abstract: In a phase locked loop (PLL), phase shifters shift a phase of an input signal. Based on the phases of the input signal, the shifted signals, and a frequency division output signal, phase frequency detectors (PFDs) generate phase difference signals. In response to the phase difference signals, charge pumps (CPs) control output voltages thereof. Based on the output voltages of the CPs, a voltage controlled oscillator (VCO) outputs an output signal. A frequency divider divides the frequency of the output signal from the VCO to generate the frequency division output signal. A circulator outputs the frequency division output signal to one of the PFDs at a proper timing. A modulator reduces quantization errors of the frequency divider.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: December 22, 2009
    Assignees: United Microelectronics Corp., National Taiwan University
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Yu-Che Yang, Tsung-Chien Wu, Tzu-Chao Lin
  • Patent number: 7577418
    Abstract: A sub-harmonic mixer and a down converter with the sub-harmonic mixer are provided. The sub-harmonic mixer includes a differential amplifying unit, a current buffer unit, and a switching unit. The differential amplifying unit is used to amplify a radio frequency (RF) signal and employs a first resonance circuit to force a leakage signal to flow to a first voltage. The current buffer unit is used to amplify the gain of an output signal of the differential amplifying unit and employs a second resonance circuit to force the leakage signal to flow to a second voltage. Finally, the switching unit switches an output signal of the current buffer unit into a base band signal.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: August 18, 2009
    Assignees: United Microelectronics Corp., National Taiwan University
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Hsiao-Chin Chen, Tzu-Chao Lin
  • Publication number: 20080224789
    Abstract: In a phase locked loop (PLL), phase shifters shift a phase of an input signal. Based on the phases of the input signal, the shifted signals, and a frequency division output signal, phase frequency detectors (PFDs) generate phase difference signals. In response to the phase difference signals, charge pumps (CPs) control output voltages thereof. Based on the output voltages of the CPs, a voltage controlled oscillator (VCO) outputs an output signal. A frequency divider divides the frequency of the output signal from the VCO to generate the frequency division output signal. A circulator outputs the frequency division output signal to one of the PFDs at a proper timing. A modulator reduces quantization errors of the frequency divider.
    Type: Application
    Filed: March 14, 2007
    Publication date: September 18, 2008
    Applicants: UNITED MICROELECTRONICS CORP., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Yu-Che Yang, Tsung-Chien Wu, Tzu-Chao Lin
  • Publication number: 20080032659
    Abstract: A sub-harmonic mixer and a down converter with the sub-harmonic mixer are provided. The sub-harmonic mixer includes a differential amplifying unit, a current buffer unit, and a switching unit. The differential amplifying unit is used to amplify a radio frequency (RF) signal and employs a first resonance circuit to force a leakage signal to flow to a first voltage. The current buffer unit is used to amplify the gain of an output signal of the differential amplifying unit and employs a second resonance circuit to force the leakage signal to flow to a second voltage. Finally, the switching unit switches an output signal of the current buffer unit into a base band signal.
    Type: Application
    Filed: July 18, 2006
    Publication date: February 7, 2008
    Applicants: UNITED MICROELECTRONICS CORP., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Hsiao-Chin Chen, Tzu-Chao Lin
  • Publication number: 20070296055
    Abstract: A radio frequency (RF) integrated circuit with electrostatic discharge (ESD) protection and an ESD protection apparatus thereof are provided. The ESD protection apparatus includes a substrate, an RF bonding pad, and an ESD protection unit. The RF bonding pad for transmitting RF signal is disposed upon the substrate. The ESD protection unit is disposed under the RF bonding pad. Wherein, The ESD protection unit includes an inductor electrically connected between the RF bonding pad and the power rail.
    Type: Application
    Filed: June 23, 2006
    Publication date: December 27, 2007
    Inventors: Albert Kuo Huei Yen, Chang-Ching Wu, Tzu-Chao Lin
  • Patent number: 7199742
    Abstract: A digital-to-analog converter has a plurality of current cells. Each of the current cells has a level shifter and a current source. The level shifter connects to a first power terminal and a second power terminal to convert a first input signal and a second input signal into a first output signal and a second output signal. The current source has two cascaded MOS transistors connected to the first power terminal in series, a first MOS switch having a gate for receiving the first output signal, and a second MOS switch having a gate for receiving the second output signal. A voltage level of the first power terminal is greater than a voltage level of the second power terminal. When one of the current cells operates, one of the first MOS switch and the second MOS switch of the current source is turned on and operates in a saturation region.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: April 3, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Tzu-Chao Lin, Yuan-Hui Chen, Hai-Thanh Nguyen
  • Publication number: 20070024479
    Abstract: A digital-to-analog converter has a plurality of current cells. Each of the current cells has a level shifter and a current source. The level shifter connects to a first power terminal and a second power terminal to convert a first input signal and a second input signal into a first output signal and a second output signal. The current source has two cascaded MOS transistors connected to the first power terminal in series, a first MOS switch having a gate for receiving the first output signal, and a second MOS switch having a gate for receiving the second output signal. A voltage level of the first power terminal is greater than a voltage level of the second power terminal. When one of the current cells operates, one of the first MOS stitch and the second MOS switch of the current source is turned on and operates in a saturation region.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Tzu-Chao Lin, Yuan-Hui Chen, Hai-Thanh Nguyen