Abstract: A top-opening substrate carrier comprises a container body, a door member and at least one latching mechanism. The latching mechanism includes a rotary drive member, a first driven cam, a second driven cam, a first connecting rod, a second connecting rod, two longitudinal latching arms and two lateral latching arms. The first driven cam and the second driven cam are disposed at two sides of the rotary drive member. When the rotary drive member is rotated by force, it links and activates the first connecting rod and the second connecting rod to synchronously drive the first driven cam and the second driven cam to rotate, thereby driving the two longitudinal latching arms and the two lateral latching arms to project towards locking holes of the container body and locked, or retract from the locking holes of the container body and unlocked.

Abstract: Concepts and examples pertaining to reconfigurable radio frequency (RF) front end and antenna arrays for radar mode switching are described. A processor associated with a radar system selects a mode of a plurality of modes in which to operate the radar system. The processor then controls the radar system to operate in the selected mode by utilizing a plurality of antennas in a respective configuration of a plurality of configurations of the antennas which corresponds to the selected mode. Each configuration of the plurality of configurations of the antennas results in respective antenna characteristics. Each configuration of the plurality of configurations of the antennas utilizes a respective number of antennas of the plurality of antennas.

Abstract: A system includes a local oscillator (LO) signal generation circuit, a receiver (RX) circuit, and a calibration circuit. The LO signal generation circuit generates an LO signal according to a reference clock, and includes an active oscillator that generates the reference clock. The active oscillator includes at least one active component. The RX circuit generates a processed RX signal by processing an RX input signal according to the LO signal. The calibration circuit checks a signal characteristic of the processed RX signal by detecting if a calibration tone exists within a receiver bandwidth, set a frequency calibration control output in response to the calibration tone being not found in the receiver bandwidth, and output the frequency calibration control output to the LO signal generation circuit. The LO signal generation circuit adjusts an LO frequency of the LO signal in response to the frequency calibration control output.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a transmit (TX) function through the auxiliary path.

Abstract: A wireless system includes an active oscillator and a front-end circuit. The active oscillator is used to generate and output a reference clock. The active oscillator includes at least one active component, and does not include an electromechanical resonator. The front-end circuit is used to process a transmit (TX) signal or a receive (RX) signal according to a local oscillator (LO) signal. The LO signal is derived from the reference clock.

Abstract: A semiconductor chip includes a first wireless communication circuit, a second wireless communication circuit, and an auxiliary path. The first wireless communication circuit includes a signal path, wherein the signal path includes a signal node. The second wireless communication circuit includes a mixer and a local oscillator (LO) buffer. The LO buffer is arranged to receive and buffer an LO signal, and is further arranged to provide the LO signal to the mixer. The auxiliary path is arranged to electrically connect the LO buffer to the signal node of the signal path, wherein the LO buffer is reused for a loop-back test function of the first wireless communication circuit through the auxiliary path.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a transmit (TX) function through the auxiliary path.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

Abstract: A system includes a local oscillator (LO) signal generation circuit, a receiver (RX) circuit, and a calibration circuit. The LO signal generation circuit generates an LO signal according to a reference clock, and includes an active oscillator that generates the reference clock. The active oscillator includes at least one active component. The RX circuit generates a processed RX signal by processing an RX input signal according to the LO signal. The calibration circuit checks a signal characteristic of the processed RX signal by detecting if a calibration tone exists within a receiver bandwidth, set a frequency calibration control output in response to the calibration tone being not found in the receiver bandwidth, and output the frequency calibration control output to the LO signal generation circuit. The LO signal generation circuit adjusts an LO frequency of the LO signal in response to the frequency calibration control output.

Abstract: A wireless system includes a local oscillator (LO) signal generation circuit, a receiver (RX) circuit, and a calibration circuit. The LO signal generation circuit generates an LO signal according to a reference clock. The LO signal generation circuit includes an active oscillator. The active oscillator generates the reference clock, wherein the active oscillator includes at least one active component, and does not include an electromechanical resonator. The RX circuit generates a down-converted RX signal by performing down-conversion upon an RX input signal according to the LO signal. The calibration circuit generates a frequency calibration control output according to a signal characteristic of the down-converted RX signal, and outputs the frequency calibration control output to the LO signal generation circuit. The LO signal generation circuit adjusts an LO frequency of the LO signal in response to the frequency calibration control output.

Abstract: A wireless system includes a local oscillator (LO) signal generation circuit, a receiver (RX) circuit, and a calibration circuit. The LO signal generation circuit generates an LO signal according to a reference clock. The LO signal generation circuit includes an active oscillator. The active oscillator generates the reference clock, wherein the active oscillator includes at least one active component, and does not include an electromechanical resonator. The RX circuit generates a down-converted RX signal by performing down-conversion upon an RX input signal according to the LO signal. The calibration circuit generates a frequency calibration control output according to a signal characteristic of the down-converted RX signal, and outputs the frequency calibration control output to the LO signal generation circuit. The LO signal generation circuit adjusts an LO frequency of the LO signal in response to the frequency calibration control output.

Abstract: A wireless system includes an active oscillator and a front-end circuit. The active oscillator is used to generate and output a reference clock. The active oscillator includes at least one active component, and does not include an electromechanical resonator. The front-end circuit is used to process a transmit (TX) signal or a receive (RX) signal according to a local oscillator (LO) signal. The LO signal is derived from the reference clock.

Abstract: Concepts and examples pertaining to reconfigurable radio frequency (RF) front end and antenna arrays for radar mode switching are described. A processor associated with a radar system selects a mode of a plurality of modes in which to operate the radar system. The processor then controls the radar system to operate in the selected mode by utilizing a plurality of antennas in a respective configuration of a plurality of configurations of the antennas which corresponds to the selected mode. Each configuration of the plurality of configurations of the antennas results in respective antenna characteristics. Each configuration of the plurality of configurations of the antennas utilizes a respective number of antennas of the plurality of antennas.

Abstract: A communication circuit includes a receiver path, a frequency translating loop filter and a signal source circuit. The frequency translating loop filter includes an auxiliary mixer, and a frequency translating filter backend circuit such as a filter. The signal source circuit can be shared with a transmitter path. When the receiver path receives an external signal, the auxiliary mixer and the frequency translating filter backend circuit perform high-frequency filtering. When the receiver path need not receive the external signal, the auxiliary mixer up-converts a low-frequency auxiliary signal provided by the signal source circuit to a high-frequency domain, and the up-converted signal is received by the receiver path. Thus, an operation parameter of the receiver path can be adjusted and calibrated according to a response of the receiver path.

Abstract: A light emitting device, includes: a substrate, including a top surface, a bottom surface, a first side surface connecting the top surface and the bottom surface, a first group of deteriorated region, and a second group of deteriorated region; and a semiconductor stack formed on the top surface of the substrate, wherein the first side surface includes a first group of convex region and a first group of concave region, wherein the first group of convex region includes the first group of deteriorated region, and the first group of concave region includes the second group of deteriorated region.

Abstract: The present disclosure provides for many different embodiments of a charged particle beam data storage system and method. In an example, a method includes dividing a design layout into a plurality of units; creating a lookup table that maps each of the plurality of units to its position within the design layout and a data set, wherein the lookup table associates any repeating units in the plurality of units to a same data set; and exposing an energy sensitive layer to a charged particle beam based on the lookup table.

Abstract: A manufacturing method of light-emitting device is disclosed. The method includes providing an LED wafer comprising a substrate and a semiconductor stack formed on the substrate, wherein the semiconductor stack has a lower surface; providing a first laser to the LED wafer to cut through the semiconductor stack with a depth into the substrate; providing and focusing a second laser on an interior of the substrate to form a plurality of textured areas in the substrate; and providing force on the LED wafer to separate the LED wafer into a plurality of LED chips.

Abstract: A method and computer program are provided for analyzing a set of layers within an integrated circuit design to determine a set of critical points for each layer within the set of layers. The critical points are based at least in part on manufacturer specific process parameters. The method includes assigning a critical point value to each of the critical points within each set of critical points, analyzing a path through the integrated circuit design across multiple integrated circuit design layers, and determining a sum of critical point values of each critical point along the path.

Abstract: The present disclosure relates to a method and apparatus to create a physical layout for electron-beam lithography, comprising defining a layout grid for a physical design, the layout grid further comprising vertical grid lines which coincide with stitching lines resulting from partitioning the physical design into a plurality of subfields. The physical design is assembled in accordance with design restrictions regarding interaction between design shapes and the layout grid. In some embodiments, the design restrictions are realized though layout restrictions. In some embodiments, the design restrictions are realized by shifting standard cells to minimize design shape interaction with the layout grid in a post-layout step. In some embodiments, the design restrictions are realized by exchanging positions between a plurality of standard cells for an exchange permutation which minimizes the number of interactions in a post-layout step.