Patents by Inventor Tzu-Hsuan Lin

Tzu-Hsuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162201
    Abstract: A micro semiconductor device includes an epitaxial structure and an optical layer. The optical layer is disposed on the epitaxial structure. The optical layer is a multi-layer film structure including a first film layer, a second film layer, and a third film layer disposed between the first film layer and the second film layer. A refractive index of the first film layer and a refractive index of the second film layer are both greater than a refractive index of the third film layer. A thickness of the third film layer is greater than a thickness of the first film layer and s thickness of the second film layer. A reflectivity of the optical layer to an external light of the micro semiconductor device is greater than a self-luminescence of the epitaxial structure of the micro semiconductor device.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 16, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Yu-Hsuan Hsiao, Teng-Hsien Lai, Tzu-Yang Lin
  • Publication number: 20240153887
    Abstract: A semiconductor package structure includes a base having a first surface and a second surface opposite thereto, wherein the base comprises a wiring structure, a first electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, a second electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, wherein the first electronic component and the second electronic component are separated by a molding material, a first hole and a second hole formed on the second surface of the base, and a frame disposed over the first surface of the base, wherein the frame surrounds the first electronic component and the second electronic component.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
  • Publication number: 20240145298
    Abstract: Structures with doping free connections and methods of fabrication are provided. An exemplary structure includes a substrate; a first region of a first conductivity type formed in the substrate; an overlying layer located over the substrate; a well region of a second conductivity type formed in the overlying layer; a conductive plug laterally adjacent to the well region and extending through the overlying layer to electrically contact with the first region; and a passivation layer located between the conductive plug and the well region.
    Type: Application
    Filed: February 17, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Min Huang, Tzu-Jui Wang, Jung-I Lin, Hung-Chang Chien, Kuan-Chieh Huang, Tzu-Hsuan Hsu, Chen-Jong Wang
  • Publication number: 20240145650
    Abstract: A package comprises a substrate including a first surface, and an upper conductive layer arranged on the first surface, a first light-emitting unit arranged on the upper conductive layer, and comprises a first semiconductor layer, a first substrate, a first light-emitting surface and a first side wall, a second light-emitting unit, which is arranged on the upper conductive layer, and comprises a second light-emitting surface and a second side wall, a light-transmitting layer arranged on the first surface and covers the upper conductive layer, the first light-emitting unit, and the second light-emitting unit, a light-absorbing layer, which is arranged between the substrate and the light-transmitting layer in a continuous configuration of separating the first light-emitting unit and the second light-emitting unit from each other, and a reflective wall arranged on the first side wall, wherein a height of the reflective wall is lower than that of the light-absorbing layer.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventors: Shau-Yi CHEN, Tzu-Yuan LIN, Wei-Chiang HU, Pei-Hsuan LAN, Min-Hsun HSIEH
  • Patent number: 11948895
    Abstract: A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. Holes are formed on a surface of the substrate, wherein the holes are located within a projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material surrounds the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate are exposed by the molding material.
    Type: Grant
    Filed: July 4, 2022
    Date of Patent: April 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Hung Lin, Chia-Cheng Chang, I-Hsuan Peng, Nai-Wei Liu
  • Patent number: 11937366
    Abstract: A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 19, 2024
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tzu Hsuan Wang, Yu Cheng Lin
  • Publication number: 20240072210
    Abstract: A micro light emitting diode structure including an epitaxial structure, a first insulating layer and a second insulating layer is provided. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer. The first type semiconductor layer, the light emitting layer and a first portion of the second type semiconductor layer form a mesa. A second portion of the second type semiconductor layer is recessed relative the mesa to form a mesa surface. The first insulating layer covers from a top surface of the mesa to the mesa surface along a first side surface of the mesa, and exposes the second side surface. The second insulating layer directly covers a second side surface of the second portion, wherein a thickness ratio of the first insulating layer to the second insulating layer is between 10 and 50.
    Type: Application
    Filed: October 21, 2022
    Publication date: February 29, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Chee-Yun Low, Yun-Syuan Chou, Hung-Hsuan Wang, Pai-Yang Tsai, Fei-Hong Chen, Tzu-Yang Lin
  • Publication number: 20210183513
    Abstract: The present disclosure provides a method for disease control of plants, comprising predicting the probability of a disease occurrence and suggesting a suitable and effective control measure for the identified pathogen and/or host. The present disclosure also provides an advisory service with recommended management actions and other alerts and notifications.
    Type: Application
    Filed: October 29, 2018
    Publication date: June 17, 2021
    Inventors: Wen-Liang Chen, Hsiao-Ching Lee, Chia-Heng Lin, Cheng-Hung Wu, Chun-Wei Liang, Tzu-Hsuan Lin, Tiffany Huang, Yi-Ting Chou, Ferng-Chang Chang, Peng-Tzu Chen, Chia-Hsuan Lin, Jung-Yu Liu, Chen-Chuan Wu, Tien-Yu Chang, Yu-Chiao Lo, Kai-Hsiang Su, Ying-Xin Li, Ming-Jie Guo
  • Publication number: 20160217963
    Abstract: The present invention provides a plasma generating device comprising a high voltage driving device, an insulated substrate, and two electrode units. The present invention further provides a manufacturing method of a plasma generating device comprising the following steps of: (1) preparing an insulated substrate with a first surface and a second surface; (2) preparing two electrode units which respectively dispose one electrode unit on the first surface and the second surface, and (3) connecting the electrode with the high voltage driving device. Compared to the prior arts, the present invention provides a simpler process to manufacture the micro plasma generating device without using delicate facilities or machine tools. The present invention has advantages of lower cost and simpler manufacturing processes.
    Type: Application
    Filed: July 23, 2015
    Publication date: July 28, 2016
    Inventors: Cheng-Che Hsu, Yao-Jhen Yang, Peng-Kai Kao, Tzu-Hsuan Lin, Chih-Chun Wang
  • Publication number: 20160198807
    Abstract: A belt buckle comprises an engaging axis, a pressing axis, a pulling axis perpendicular to the engaging axis, a female buckle member, a male buckle member; a holding mechanism disposed between the male buckle member and the female buckle member and disposed on the pulling axis. The female and male buckle member each comprises a connecting portion; an engaging portion. The engaging portion of the female buckle member comprises a bottom surface, an engaging recess, an inner surface; two engaging holes. The engaging portion of the male buckle member comprises two inner pressing components respectively comprising an engaging protrusion. The pulling force of straps mounted on the connecting portions is balanced by the holding mechanism and the combination of the engaging protrusions and the engaging holes when the belt buckle is in use, thereby improving the engaging strength of the male and female buckle members; ensuring the connection between straps.
    Type: Application
    Filed: January 8, 2015
    Publication date: July 14, 2016
    Inventor: Tzu-Hsuan Lin