Patents by Inventor Tzu-Pei Chen
Tzu-Pei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240006505Abstract: A semiconductor device includes a semiconductor structure, a conductive nitride feature, a third dielectric feature, and a conductive line feature. The semiconductor structure includes a substrate, two source/drain regions disposed in the substrate, a first dielectric feature disposed over the substrate, a gate structure disposed in the first dielectric feature and between the source/drain regions, a second dielectric feature disposed over the first dielectric feature, and a contact feature disposed in the second dielectric feature and being connected to at least one of the source/drain regions and the gate structure. The conductive nitride feature includes metal nitride or alloy nitride, is disposed in the second dielectric feature, and is connected to the contact feature. The third dielectric feature is disposed over the second dielectric feature. The conductive feature is disposed in the third dielectric feature and is connected to the conductive nitride feature opposite to the contact feature.Type: ApplicationFiled: June 30, 2022Publication date: January 4, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Po-Chin CHANG, Yuting CHENG, Hsu-Kai CHANG, Chia-Hung CHU, Tzu-Pei CHEN, Shuen-Shin LIANG, Sung-Li WANG, Pinyen LIN, Lin-Yu HUANG
-
Publication number: 20230395504Abstract: Provided are devices with conductive contacts and methods for forming such devices. A method includes forming a lower conductive contact in a dielectric material and over a structure, wherein the lower conductive contact has opposite sidewalls that extend to and terminate at a top surface. The method also includes separating an upper portion of each sidewall from the dielectric material and locating a barrier material between the upper portion of each sidewall and the dielectric material. Further, the method includes forming an upper conductive contact over the lower conductive contact.Type: ApplicationFiled: June 1, 2022Publication date: December 7, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu Pei Chen, Chia-Hao Chang, Shin-Yi Yang, Chia-Hung Chu, Po-Chin Chang, Shuen-Shin Liang, Chun-Hung Liao, Yuting Cheng, Hung-Yi Huang, Harry Chien, Pinyen Lin, Sung-Li Wang
-
Publication number: 20230299168Abstract: A semiconductor device includes a semiconductor substrate, an epitaxial structure, a silicide structure, a conductive structure, and a protection segment. The epitaxial structure is disposed in the semiconductor substrate. The silicide structure is disposed in the epitaxial structure. The conductive structure is disposed over the silicide structure and is electrically connected to the silicide structure. The protection segment is made of metal nitride, is disposed over the silicide structure, and is disposed between the silicide structure and the conductive structure.Type: ApplicationFiled: March 15, 2022Publication date: September 21, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuan-Kan HU, Shuen-Shin LIANG, Chia-Hung CHU, Po-Chin CHANG, Hsu-Kai CHANG, Ken-Yu CHANG, Wei-Yip LOH, Hung-Yi HUANG, Harry CHIEN, Sung-Li WANG, Pinyen LIN, Chuan-Hui SHEN, Tzu-Pei CHEN, Yuting CHENG
-
Publication number: 20230253308Abstract: A method for manufacturing a semiconductor device includes forming a conductive feature in a first dielectric layer; forming a second dielectric layer on the first dielectric layer; forming a trench that penetrates through the second dielectric layer, and terminates at the conductive feature; forming a contact layer in the trench and on the conductive feature; etching back the contact layer to form a first via contact feature in the trench, the first via contact feature being electrically connected to the conductive feature; and forming a second via contact feature on the first via contact feature in the trench.Type: ApplicationFiled: February 10, 2022Publication date: August 10, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Hung CHU, Po-Chin CHANG, Tzu-Pei CHEN, Yuting CHENG, Kan-Ju LIN, Chih-Shiun CHOU, Hung-Yi HUANG, Pinyen LIN, Sung-Li WANG, Sheng-Tsung WANG, Lin-Yu HUANG, Shao-An WANG, Harry CHIEN
-
Publication number: 20230230916Abstract: A method for manufacturing a semiconductor device includes: forming a lower metal contact in a trench of a first dielectric structure, the lower metal contact having a height less than a depth of the trench and being made of a first metal material; forming an upper metal contact to fill the trench and to be in contact with the lower metal contact, the upper metal contact being formed of a second metal material different from the first metal material and having a bottom surface with a dimension the same as a dimension of a top surface of the lower metal contact; forming a second dielectric structure on the first dielectric structure; and forming a via contact penetrating through the second dielectric structure to be electrically connected to the upper metal contact, the via contact being formed of a metal material the same as the second metal material.Type: ApplicationFiled: January 18, 2022Publication date: July 20, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shuen-Shin LIANG, Chia-Hung CHU, Po-Chin CHANG, Tzu-Pei CHEN, Ken-Yu CHANG, Hung-Yi HUANG, Harry CHIEN, Wei-Yip LOH, Chun-I TSAI, Hong-Mao LEE, Sung-Li WANG, Pinyen LIN
-
Publication number: 20230068965Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, a layer of dielectric material over the gate structure, a source/drain (S/D) contact layer formed through and adjacent to the gate structure, and a trench conductor layer over and in contact with the S/D contact layer. The S/D contact layer can include a layer of platinum-group metallic material and a silicide layer formed between the substrate and the layer of platinum-group metallic material. A top width of a top portion of the layer of platinum-group metallic material can be greater than or substantially equal to a bottom width of a bottom portion of the layer of platinum-group metallic material.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Hung CHU, Shuen-Shin LIANG, Hsu-Kai CHANG, Tzu Pei CHEN, Kan-Ju LIN, Chien CHANG, Hung-Yi HUANG, Sung-Li WANG
-
Publication number: 20230029002Abstract: The present disclosure describes a semiconductor device with a nitrided capping layer and methods for forming the same. One method includes forming a first conductive structure in a first dielectric layer on a substrate, depositing a second dielectric layer on the first conductive structure and the first dielectric layer, and forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer. The method further includes forming a nitrided layer on a top portion of the first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer, and forming a second conductive structure in the opening, where the second conductive structure is in contact with the nitrided layer.Type: ApplicationFiled: January 18, 2022Publication date: January 26, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Chin Chang, Lin-Yu Huang, Shuen-Shin Liang, Sheng-Tsung Wang, Cheng-Chi Chuang, Chia-Hung Chu, Tzu Pei Chen, Yuting Cheng, Sung-Li Wang
-
Publication number: 20060101460Abstract: A method for integrating software distribution. A main execution file and a plurality of shared distribution systems are packaged as a main installation program. The main installation program accesses an installation configuration file, registering the number of installation components and installation sequences corresponding to each installation component. The main installation program installs the shared distribution systems and a component execution file in an installation component according to one installation sequence.Type: ApplicationFiled: January 18, 2005Publication date: May 11, 2006Inventor: Tzu-Pei Chen
-
Publication number: 20060023274Abstract: An electronic photo display device. The device comprises a panel, which is the size of a typical photo, an internal storage medium storing digital image files, and a central control unit. The central control unit acquires a digital image from the internal storage medium and displaying it on the panel according to a control command.Type: ApplicationFiled: March 22, 2005Publication date: February 2, 2006Inventor: Tzu-Pei Chen
-
Publication number: 20050222839Abstract: A multilingual software installation system and method. The system includes a multilingual text file and a setup module. The multilingual text file is constructed with sections and index directives, including at least a first tier section, a second tier section and a third tier section. During software installation, the setup module retrieves an environment language family code and an environment language code of a setup environment, searches for a language family in the first tier section according to the environment language family code, searches for a language type in the second tier section corresponding to the language family according to the environment language code, and retrieves sentences/data from the third tier section corresponding to the language type.Type: ApplicationFiled: July 26, 2004Publication date: October 6, 2005Inventor: Tzu-Pei Chen
-
Publication number: 20030025490Abstract: A method for verifying a device under test includes inputting a control command, compiling the control command to a corresponding data-bus command, and simulating the result generated by the device under test after executing the data-bus command and comparing the result with an expected value. The method allows the tester to input readable hardware control commands with various methods, rather than to perform a simulation test by inputting unreadable data-bus control commands.Type: ApplicationFiled: March 28, 2002Publication date: February 6, 2003Inventor: Tzu-Pei Chen
-
Patent number: D493122Type: GrantFiled: August 25, 2003Date of Patent: July 20, 2004Assignee: Kwang Yang Motor Co., Ltd.Inventors: Kuo-Feng Huang, Tzu-Pei Chen
-
Patent number: D586694Type: GrantFiled: February 15, 2007Date of Patent: February 17, 2009Assignee: Kwang Yang Motor Co., Ltd.Inventors: Kuo-Feng Huang, Han-Pin Tsai, Tzu-Pei Chen
-
Patent number: D593909Type: GrantFiled: September 30, 2008Date of Patent: June 9, 2009Assignee: Kwang Yang Motor Co., Ltd.Inventors: Chi-Hsien Chiu, Tzu-Pei Chen, Cheng-Wei Lin
-
Patent number: D602816Type: GrantFiled: February 26, 2009Date of Patent: October 27, 2009Assignee: Kwang Yang Motor Co., LtdInventors: Cheng-Wei Lin, Kuo-Feng Huang, Tzu-Pei Chen