Patents by Inventor Tzuriel Katoa

Tzuriel Katoa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240143526
    Abstract: Computing apparatus includes a central processing unit (CPU) and a root complex connected to the CPU and to a first peripheral component bus, which has at least a first downstream port for connection to at least one peripheral device. Switching logic has an upstream port for connection to a second downstream port on a second peripheral component bus of a host computer, and is connected to the root complex so that when a peripheral device is connected to the first downstream port on the first peripheral component bus, the switching logic presents the peripheral device to the host computer in an address space of the second peripheral component bus.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Liran Liss, Rabia Loulou, Idan Burstein, Tzuriel Katoa
  • Publication number: 20220075747
    Abstract: A networking device, system, and method of operating a networking device are provided. The illustrative networking device is disclosed to include one or more physical ports, an emulated switch positioned between the one or more physical ports and a host device, and one or more emulated devices positioned between the emulated switch and the one or more physical ports. The one or more emulated devices may be configured to populate the one or more physical ports.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Inventors: Shahaf Shuler, Peter Paneah, Tzuriel Katoa
  • Patent number: 10394747
    Abstract: A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores. Also disclosed are techniques for implementing hierarchical serial interconnects such as a PCI Express switch topology over a coherent mesh interconnect.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: August 27, 2019
    Assignee: Mellanox Technologies Ltd.
    Inventors: Peter Paneah, Carl G. Ramey, Gil Moran, Adi Menachem, Christopher J. Jackson, Ilan Pardo, Ariel Shahar, Tzuriel Katoa