Patents by Inventor Uday Bhaskar

Uday Bhaskar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10990146
    Abstract: Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: April 27, 2021
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Pradipta Patra, Gaurav Goel, Uday Bhaskar Kadali
  • Patent number: 10830850
    Abstract: A method includes capturing a first set of optical images of the subject while a subject is lying on a table of a Magnetic Resonance (MR) scanner. This first set of optical images is acquired without any MR phased-array coils placed on the subject. While the subject continues to lie on the table of the MR scanner, a second set of optical images of the subject is acquired with the MR phased-array coils placed on the subject. Aside from the optical images, a set of MR images of the subject is acquired using the MR scanner. The first and second set of optical images are registered to the MR images. Following registration, the first and second set of optical images are used to determine element positioning of the MR phased-array coils in the set of MR images.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: November 10, 2020
    Assignee: Siemens Healthcare GmbH
    Inventors: Xiaoming Bi, Uday Bhaskar Krishnamurthy
  • Publication number: 20200309880
    Abstract: A method includes capturing a first set of optical images of the subject while a subject is lying on a table of a Magnetic Resonance (MR) scanner. This first set of optical images is acquired without any MR phased-array coils placed on the subject. While the subject continues to lie on the table of the MR scanner, a second set of optical images of the subject is acquired with the MR phased-array coils placed on the subject. Aside from the optical images, a set of MR images of the subject is acquired using the MR scanner. The first and second set of optical images are registered to the MR images. Following registration, the first and second set of optical images are used to determine element positioning of the MR phased-array coils in the set of MR images.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 1, 2020
    Inventors: Xiaoming Bi, Uday Bhaskar Krishnamurthy
  • Publication number: 20200301748
    Abstract: Examples of load balancing across multiple computing nodes of distributed computing systems is described herein. Examples include determining whether an application request is part of a first application request set or a second application request set, and routing the application request to a first computing node or a second computing node of a computing node cluster based on the determination. Other examples include determining whether a database operation request directed to a database is part of a first database operation set or a second database operation set, and routing the database operation request to a first server using a first instance of the database or a second server using a second instance of the database based on the determination. Routing the application and database operation requests based on criteria of the respective request may improve execution efficiency of the requests.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 24, 2020
    Applicant: Nutanix, Inc.
    Inventors: ANKUR GUPTA, NITIN JAIN, MANISH KUMAR, UDAY BHASKAR
  • Patent number: 10751337
    Abstract: The present invention provides a preservative free ophthalmic formulation. In particular, the ophthalmic formulations of the invention are aqueous formulations comprising nanoemulsion of oil. The present invention also provides a method for treating an eye disorder. In one particular embodiment, the invention provides methods for treating dry eye syndrome using an preservative free formulation comprising a nanoemulsion of oil and alpha 2 adrenergic agonist, pharmaceutically acceptable salt thereof or a mixture thereof. In particular, the alpha 2 adrenergic agonist of the invention has a higher alpha 2A agonist activity compared to alpha 2B agonist activity. This invention also provides a preservative free ophthalmic composition comprising a nanoemulsion of oil, a therapeutically effective amount of an alpha 2 adrenergic agonist, a pharmaceutically acceptable salt thereof or a combination thereof as an active ingredient for treating a dry eye syndrome.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: August 25, 2020
    Assignees: Ocugen, Inc., THE BOARD OF TRUSTEEES OF THE UNIVERSITY OF ILLINOIS
    Inventors: Sandeep Jain, Uday Bhaskar Kompella, Shankar Musunuri
  • Publication number: 20200151010
    Abstract: An aspect of the present disclosure is directed to scheduling of a fixed number of non-sharable resources. In one embodiment, a schedule data specifying respective durations in which a non-sharable resource is allocated to corresponding sets of users is maintained. A check is performed in a duration (between start and end time instances) whether the non-sharable resource is being used by a set of users specified in the schedule data. The non-sharable resource is deallocated from the set of users within the duration if checking determines that the non-sharable resource is not being used by the set of users. Accordingly, the non-sharable resource is made available for allocation before the end time instance.
    Type: Application
    Filed: November 10, 2018
    Publication date: May 14, 2020
    Inventors: Snehal Wadhwani, Manish Kumar, Ratan Kumar, Uday Bhaskar
  • Publication number: 20190220074
    Abstract: Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 18, 2019
    Inventors: Ramnarayanan MUTHUKARUPPAN, Pradipta PATRA, Gaurav GOEL, Uday Bhaskar KADALI
  • Patent number: 10345881
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Harish K. Krishnamurthy, Mohit Verma, Pradipta Patra, Uday Bhaskar Kadali
  • Patent number: 10268249
    Abstract: Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: April 23, 2019
    Assignee: INTEL CORPORATION
    Inventors: Ramnarayanan Muthukaruppan, Pradipta Patra, Gaurav Goel, Uday Bhaskar Kadali
  • Patent number: 10185382
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: January 22, 2019
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Harish K. Krishnamurthy, Mohit Verma, Pradipta Patra, Uday Bhaskar Kadali
  • Publication number: 20180153885
    Abstract: The present invention provides a preservative free ophthalmic formulation. In particular, the ophthalmic formulations of the invention are aqueous formulations comprising nanoemulsion of oil. The present invention also provides a method for treating an eye disorder. In one particular embodiment, the invention provides methods for treating dry eye syndrome using an preservative free formulation comprising a nanoemulsion of oil and alpha 2 adrenergic agonist, pharmaceutically acceptable salt thereof or a mixture thereof. In particular, the alpha 2 adrenergic agonist of the invention has a higher alpha 2A agonist activity compared to alpha 2B agonist activity. This invention also provides a preservative free ophthalmic composition comprising a nanoemulsion of oil, a therapeutically effective amount of an alpha 2 adrenergic agonist, a pharmaceutically acceptable salt thereof or a combination thereof as an active ingredient for treating a dry eye syndrome.
    Type: Application
    Filed: January 30, 2018
    Publication date: June 7, 2018
    Applicants: The Board of Trustees of the University of Illinois, Ocugen, Inc.
    Inventors: Sandeep Jain, Uday Bhaskar Kompella, Shankar Musunuri
  • Patent number: 9877964
    Abstract: The present invention relates to a method for treating a dry eye syndrome using an alpha 2 adrenergic agonist, pharmaceutically acceptable salt thereof or a mixture thereof. In particular, the alpha 2 adrenergic agonist of the invention has a higher alpha 2A agonist activity compared to alpha 2B agonist activity. This invention also relates to an ophthalmic composition comprising a therapeutically effective amount of an alpha 2 adrenergic agonist, a pharmaceutically acceptable salt thereof or a combination thereof as an active ingredient for treating a dry eye syndrome.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: January 30, 2018
    Assignees: Ocugen, Inc., The Board of Trustees of the University of Illinois
    Inventors: Sandeep Jain, Uday Bhaskar Kompella, Shankar Musunuri
  • Publication number: 20170315601
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Application
    Filed: July 19, 2017
    Publication date: November 2, 2017
    Inventors: Ramnarayanan MUTHUKARUPPAN, Harish K. KRISHNAMURTHY, Mohit VERMA, Pradipta PATRA, Uday Bhaskar KADALI
  • Patent number: 9766678
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Harish K. Krishnamurthy, Mohit Verma, Pradipta Patra, Uday Bhaskar Kadali
  • Publication number: 20170189396
    Abstract: The present invention relates to a method for treating a dry eye syndrome using an alpha 2 adrenergic agonist, pharmaceutically acceptable salt thereof or a mixture thereof. In particular, the alpha 2 adrenergic agonist of the invention has a higher alpha 2A agonist activity compared to alpha 2B agonist activity. This invention also relates to an ophthalmic composition comprising a therapeutically effective amount of an alpha 2 adrenergic agonist, a pharmaceutically acceptable salt thereof or a combination thereof as an active ingredient for treating a dry eye syndrome.
    Type: Application
    Filed: March 20, 2017
    Publication date: July 6, 2017
    Applicants: The Board of Trustees of the University of Illinois, Ocugen, Inc.
    Inventors: Sandeep Jain, Uday Bhaskar Kompella, Shankar Musunuri
  • Patent number: 9651961
    Abstract: Methods and systems to regulate a voltage with multiple selectable voltage regulator (VR) modes, using multiple corresponding circuits and/or a configurable circuit. The circuit may be configurable for one or more of a power-gate VR mode, a switched-capacitor VR (SCVR) mode, and a linear mode, such as a low drop-out (LDO) VR mode. A feedback controller, such as a proportional-integral-derivative (PID) controller, may configure and/or control a multi-mode VR for a selected VR mode. The feedback controller may select a VR mode based on a reference voltage and voltage ranges associated with the VR modes. The circuit may be configurable as banks of VRs, and the controller may be implemented to transition between VR modes by switching sub-banks between modes until the transition is complete.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: May 16, 2017
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Pradyumna Agashe, Uday Bhaskar Kadali, Jnaneshwar Madugonda
  • Patent number: 9597328
    Abstract: The present invention discloses pharmaceutical preparations for treatment of eye disorders containing an alpha 2 adrenergic agonist, to processes for producing the pharmaceutical preparations and methods for treatment of various eye disorders including dry eye and Meibomian gland dysfunction and a medicinal applicator for topical application of an alpha 2 adrenergic agonist to a subject, a package assembly for the medicinal applicator and methods of using the medicinal applicator to treat eye disorders.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: March 21, 2017
    Assignees: Ocugen, Inc., The Board of Trustees of the University of Illinois
    Inventors: Sandeep Jain, Uday Bhaskar Kompella, Shankar Musunuri
  • Publication number: 20170031411
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Application
    Filed: October 12, 2016
    Publication date: February 2, 2017
    Inventors: Ramnarayanan MUTHUKARUPPAN, Harish K. KRISHNAMURTHY, Mohit VERMA, Pradipta PATRA, Uday Bhaskar KADALI
  • Publication number: 20160243116
    Abstract: The present invention discloses pharmaceutical preparations for treatment of eye disorders containing an alpha 2 adrenergic agonist, to processes for producing the pharmaceutical preparations and methods for treatment of various eye disorders including dry eye and Meibomian gland dysfunction and a medicinal applicator for topical application of an alpha 2 adrenergic agonist to a subject, a package assembly for the medicinal applicator and methods of using the medicinal applicator to treat eye disorders.
    Type: Application
    Filed: February 23, 2016
    Publication date: August 25, 2016
    Applicants: The Board of Trustees of the University of Illinois, Ocugen, Inc.
    Inventors: Sandeep Jain, Uday Bhaskar Kompella, Shankar Musunuri
  • Publication number: 20160246342
    Abstract: Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.
    Type: Application
    Filed: December 18, 2013
    Publication date: August 25, 2016
    Inventors: Ramnarayanan MUTHUKARUPPAN, Pradipta PATRA, Gaurav GOEL, Uday Bhaskar KADALI