Abstract: A method for fabricating silicon die stacks for electron emitter chips by applying sintering to bind a silicon substrate die to other die layers. Metal powder is applied to the bonding surface of the die, covered with the chip carrier or chip and compressed between two heated plates. The bonding pads of the die may be conductively coupled to corresponding bonding pads of the other die layers.

Abstract: Techniques for temperature-controlled ion implantation are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for temperature-controlled ion implantation. The apparatus may comprise at least one thermal sensor adapted to measure a temperature of a wafer during an ion implantation process inside an end station of an ion implanter. The apparatus may also comprise a thermal conditioning unit coupled to the end station. The apparatus may further comprise a controller in communication with the thermal sensor and the thermal conditioning unit, wherein the controller compares the measured temperature to a desired wafer temperature and causes the thermal conditioning unit to adjust the temperature of the wafer based upon the comparison.

Abstract: Methods and apparatus that introduce, within the ion implant chamber or an isolated chamber in communication therewith, the capability to remove contaminants and oxide surface layers on a wafer surface prior to ion implantation, are disclosed. The mechanisms for removal of contaminants include conducting: a low energy plasma etch, heating the wafer and application of ultraviolet illumination, either in combination or individually. As a result, implantation can occur immediately after the cleaning/preparation process without the contamination potential of exposure of the wafer to an external environment. The preparation allows for the removal of surface contaminants, such as water vapor, organic materials and surface oxides.

Abstract: A system, method and program product for monitoring the beam angle integrity of an ion beam generated by an ion implanter system are disclosed. The invention utilizes at least one template with each template having a template surface that impedes the motion of an ion. Each template is configured such that an ion impacts the surface of the template if the trajectory of the template deviates from the optimum trajectory by a pre-determined maximum variance angle. The change caused by the impact of the ions with the template and/or a target is then measured to determine the amount of variance in the ion beam. Adjustments can then be made to the ion beam generator to correct for a misaligned beam.

Abstract: Methods and apparatus that introduce, within the ion implant chamber or an isolated chamber in communication therewith, the capability to remove contaminants and oxide surface layers on a wafer surface prior to ion implantation, are disclosed. The mechanisms for removal of contaminants include conducting: a low energy plasma etch, heating the wafer and application of ultraviolet illumination, either in combination or individually. As a result, implantation can occur immediately after the cleaning/preparation process without the contamination potential of exposure of the wafer to an external environment. The preparation allows for the removal of surface contaminants, such as water vapor, organic materials and surface oxides.

Abstract: A method for fabricating a semiconductor-based device includes providing a substrate including a semiconductor layer, forming a gate dielectric layer on the semiconductor layer, forming a plasma including deuterium, plasma implanting deuterium from the plasma into the substrate, and annealing the substrate to promote passivation of the interface between the dielectric layer and the semiconductor layer.

Abstract: Techniques for temperature-controlled ion implantation are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for temperature-controlled ion implantation. The apparatus may comprise at least one thermal sensor adapted to measure a temperature of a wafer during an ion implantation process inside an end station of an ion implanter. The apparatus may also comprise a thermal conditioning unit coupled to the end station. The apparatus may further comprise a controller in communication with the thermal sensor and the thermal conditioning unit, wherein the controller compares the measured temperature to a desired wafer temperature and causes the thermal conditioning unit to adjust the temperature of the wafer based upon the comparison.

Abstract: A method for fabricating a semiconductor-based device includes providing a substrate including a semiconductor layer, forming a gate dielectric layer on the semiconductor layer, forming a plasma including deuterium, plasma implanting deuterium from the plasma into the substrate, and annealing the substrate to promote passivation of the interface between the dielectric layer and the semiconductor layer.

Abstract: Methods and apparatus for plasma ion implantation with improved dopant profiles are provided. A plasma ion implantation system includes a process chamber, a plasma source to generate a plasma in the process chamber, a platen to hold the substrate in the process chamber and a pulse source to generate implant pulses to accelerate ions from the plasma into the substrate. In one aspect, the pulse source generates implant pulses having pulse widths that are sufficiently long to limit plasma ion implantation during a transient period at the start of each implant pulse to a small fraction of the total implanted dose. In another aspect, ions are generated in a region of the process chamber near a reference potential, such as ground, and are accelerated from the region of plasma generation to the platen. Plasma generation may be enabled after the start of each implant pulse and may be disabled before the end of each implant pulse.

Abstract: A system, method and program product for monitoring the beam angle integrity of an ion beam generated by an ion implanter system are disclosed. The invention utilizes at least one template with each template having a template surface that impedes the motion of an ion. Each template is configured such that an ion impacts the surface of the template if the trajectory of the template deviates from the optimum trajectory by a pre-determined maximum variance angle. The change caused by the impact of the ions with the template and/or a target is then measured to determine the amount of variance in the ion beam. Adjustments can then be made to the ion beam generator to correct for a misaligned beam.

Abstract: A system, method and program product for adjusting metal work function by ion implantation is disclosed. The invention determines the work function of the metal and determines a desired work function threshold for the metal. The desired work function threshold may be a range and is usually based on the work function of the substrate. An ion implanter system is then used to implant ions to at least a portion of the metal. The ion implantation is usually a high-energy ion stream including a material that is calculated to modify the work function of the metal. The ion implanter system continues to transmit the ion stream into the metal until the work function of the metal meets the desired work function threshold.

Abstract: A method for fabricating a semiconductor-based device includes disposing a substrate in a process chamber of a process tool, plasma implanting a dopant species from a plasma into a portion of the substrate in the process chamber, and plasma depositing a diffusion barrier on the implanted portion of the substrate prior to removing the at least one substrate from the process tool. The diffusion barrier can be deposited in the same chamber as that used for dopant implantation or a different chamber of the process tool.

Abstract: A method for fabricating a semiconductor-based device includes providing a doped semiconductor substrate, introducing a second dopant into the substrate to define a pn junction, and introducing a neutralizing species into the substrate in the neighborhood of the pn junction to reduce a capacitance associated with the pn junction. A semiconductor-based device includes a semiconductor substrate having first and second dopants, and a neutralizing species. The first and second dopants define a pn junction, and the neutralizing species neutralizes a portion of the first dopant in the neighborhood of the pn junction to decrease a capacitance associated with the pn junction.

Abstract: Methods and apparatus that introduce, within the ion implant chamber or an isolated chamber in communication therewith, the capability to remove contaminants and oxide surface layers on a wafer surface prior to ion implantation, are disclosed. The mechanisms for removal of contaminants include conducting: a low energy plasma etch, heating the wafer and application of ultraviolet illumination, either in combination or individually. As a result, implantation can occur immediately after the cleaning/preparation process without the contamination potential of exposure of the wafer to an external environment. The preparation allows for the removal of surface contaminants, such as water vapor, organic materials and surface oxides.