Abstract: A cooking device, in particular a steam oven, includes a cooking cavity and a heating unit. The heating unit has a first and a second heating element capable to operate at different temperatures, and at least one fan. The cooking device is configured in such a manner that the fan collects air from the cooking cavity and conveys a first airflow towards the first heating element and a second airflow towards the second heating element. The first airflow passing the first heating element creates a first airflow circuit in the cooking cavity, and the second airflow passing the second heating element creates a second airflow circuit in the cooking cavity. The two airflows can have different temperatures by individually controlling the power of the two heating element.

Abstract: In order to predict disease risks, disease courses and the response of an individual patient to pharmacological and non-pharmacological therapies a polymorphism in the AQP5 gene has been investigated, in particular in the promoter region of said gene,on the human 12q13 chromosome, wherein the therapy can also be a cosmetic treatment.

Abstract: In order to determine the risk of disease, the course of a disease, the action of medicaments, the side-effects of medicaments and drug targets, a base substitution is identified in the non-translated region 5? of the gene for the G?q sub-unit of human G proteins, preferably the presence of two or three of the polymorphisms GC(?909/?908)TT, G(?382)A or G(?387)A being detected.

Abstract: The present invention provides a fabrication method for a semiconductor structure and a corresponding semiconductor structure.

Abstract: Transistor structures, with one source/drain region connected to a charge storage device to be insulated includes an asymmetric gate conductor structure. At a first side wall, which faces the one source/drain region, the asymmetric gate conductor structure has a side wall oxide with a greater thickness and a bird's beak structure with a greater length than at an opposite, second side wall. An effective channel length is increased for the same feature size of the gate conductor structure. Memory cells can be realized in a higher density.

Abstract: An antifuse apparatus includes first and second independent current paths connected to an antifuse. One of the current paths can be used to program the antifuse, and the other current path can be used to detect the status (programmed or not programmed) of the antifuse.

Abstract: The invention relates to a semiconductor circuit (20) having an electrically programmable switching element (10), an “antifuse”, which includes a substrate electrode (2), produced in a substrate (1) which can be electrically biased with a substrate potential (Vo), and an opposing electrode (5) which is isolated from the substrate electrode (2) by an insulating layer (8), where the substrate electrode (2) includes at least one highly doped substrate region (3), and where the opposing electrode (5) can be connected to an external first electrical potential (V+) which can be provided outside of the semiconductor circuit (20). In line with the invention, the substrate electrode (2) can be connected to a second electrical potential (V?), which is provided inside the circuit and which, together with the external first potential (V+), produces a higher programming voltage (V) than the external first potential (V?) together with the substrate potential (Vo).

Abstract: The invention concerns the use of a genomic gene modification in the gene for the Gas subunit of the human G protein, coded by the gene GNAS (or GNAS1), for the prediction of disease risks, disease clinical courses and responses to pharmacological and non-pharmacological measures and for the prediction of adverse drug reactions (side-effects). In addition, it concerns the provision of individual gene modifications and haplotypes, with the help of which additional gene modifications applicable for the above purposes can be detected and validated.

Abstract: The present invention provides a fabrication method for a semiconductor structure and a corresponding semiconductor structure.

Abstract: Transistor structures, with one source/drain region connected to a charge storage device to be insulated includes an asymmetric gate conductor structure. At a first side wall, which faces the one source/drain region, the asymmetric gate conductor structure has a side wall oxide with a greater thickness and a bird's beak structure with a greater length than at an opposite, second side wall. An effective channel length is increased for the same feature size of the gate conductor structure. Memory cells can be realized in a higher density.

Abstract: The invention relates to a semiconductor circuit (20) having an electrically programmable switching element (10), an “antifuse”, which comprises a substrate electrode (2), produced in a substrate (1) which can be electrically biased with a substrate potential (Vo), and an opposing electrode (5) which is isolated from the substrate electrode (2) by an insulating layer (8), where the substrate electrode (2) comprises at least one highly doped substrate region (3), and where the opposing electrode (5) can be connected to an external first electrical potential (V+) which can be provided outside of the semiconductor circuit (20). In line with the invention, the substrate electrode (2) can be connected to a second electrical potential (V?), which is provided inside the circuit and which, together with the external first potential (V+), produces a higher programming voltage (V) than the external first potential (V?) together with the substrate potential (Vo).

Abstract: An antifuse apparatus includes first and second independent current paths connected to an antifuse. One of the current paths can be used to program the antifuse, and the other current path can be used to detect the status (programmed or not programmed) of the antifuse.

Abstract: As disclosed herein, a structure and method is provided for forming an integrated circuit including a reduced programming voltage antifuse on a semiconductor substrate. The method includes doping a portion of a semiconductor substrate with nitrogen and a charge carrier dopant source, and forming a thin dielectric over the doped portion of the semiconductor substrate, wherein the thin dielectric is subject to breakdown upon application of a breakdown voltage. The method further includes forming a first conductor separated from the semiconductor substrate by the thin dielectric, and forming a second conductor conductively coupled to the doped portion of the semiconductor substrate.

Abstract: An anti-fuse system composed of a multiplicity of anti-fuse circuits (24, 26, 28, N) connected across a voltage source (10) by a pair of conductors (16, 18). Each anti-fuse circuit comprising an anti-fuse (30) connected in a series with a blow or control transistor (36) and a control circuit (44) for monitoring the status of the anti-fuse (30), Control circuit (44) provides an “on” signal to the gate (38) of control transistor (36) only when a_“select_” signal is received at an input (46) of control circuit (44) and if anti-fuse (30) has not been blown. After the anti-fuse (30) is blown, control circuit (44) turns off the control transistor (36) thereby providing a constant power source voltage across each anti-fuse circuit (24, 26, 28, N) regardless of the number of parallel anti-fuses which have been blown.

Abstract: An anti-fuse system composed of a multiplicity of anti-fuse circuits (24, 26, 28, N) connected across a voltage source (10) by a pair of conductors (16, 18). Each anti-fuse circuit comprising an anti-fuse (30) connected in series with a blow or control transistor (36) and a control circuit (44) for monitoring the status of the anti-fuse (30) at a voltage node (48) located between the anti-fuse (30) and blow transistor (36). When operating in a blow cycle, control circuit (44) provides an “on” signal to the gate (38) of blow transistor (36) only when a select signal is received at an input (46) of control circuit (44) and if anti-fuse (30) has not been blown. Therefore, after the anti-fuse (30) is blown, control circuit (44) turns off blow transistor (36) thereby providing a constant power source voltage across each anti-fuse circuit (24, 26, 28, N) regardless of the number of parallel anti-fuses which have been blown.

Abstract: The present invention provides for evaluating a programmable anti-fuse element. For a programmable transistor anti-fuse, the gate of the anti-fuse is precharged with a predetermined voltage and/or current and the anti-fuse is subsequently evaluated. In one embodiment a precharge voltage sufficient to turn ON a transistor is provided to the gate. Here, an intact (unblown) transistor remains ON over a period of time and a damaged (blown) transistor dissipates the charge voltage and turns OFF. The status of the transistor is subsequently determined by evaluating the resistance between the drain and source. A high resistance indicates a blown condition and a low resistance indicates an unblown condition. In another embodiment, a small current is provided to the gate in which the small current is greater than a leakage current for an intact transistor and is less than a leakage current for a damaged transistor.

Abstract: The present invention provides a method for fabricating an integrated circuit, comprising the following steps: preparing a circuit substrate (1); providing a metallization region (10a) comprising a first metal in the circuit substrate (1); providing a first insulation layer (25) above the metallization region (10a); forming an opening (13) in the insulating layer (25) in order to uncover at least part of the surface of the metallization region (10a); depositing a functional layer (15′) above the resulting structure; depositing a second insulating layer (35) above the resulting structure, in such a manner that the opening (13) is filled; polishing-back of the second insulating layer (35) and of the functional layer (15′) in order to uncover the surface of the first insulating layer (25); forming a contact (11a′) in the second insulating layer (35) inside the opening (13) in order to make contact with the functional layer (15′); and providing an interconnect (40a) for electrical connecti

Abstract: The present invention provides a method for fabricating an integrated circuit, comprising the following steps: preparing a circuit substrate (1); providing a metallization region (10a) comprising a first metal in the circuit substrate (1); providing a first insulation layer (25) above the metallization region (10a); forming an opening (13) in the insulating layer (25) in order to uncover at least part of the surface of the metallization region (10a); depositing a functional layer (15′) above the resulting structure; depositing a second insulating layer (35) above the resulting structure, in such a manner that the opening (13) is filled; polishing-back of the second insulating layer (35) and of the functional layer (15′) in order to uncover the surface of the first insulating layer (25); forming a contact (11a′) in the second insulating layer (35) inside the opening (13) in order to make contact with the functional layer (15′); and providing an interconnect (40a) for electrical connecti

Abstract: To provide a recovery plant for surplus water paint in paint-spraying booths comprising a circuit of water circulating in the booth, wherein such problems with sedimenting water paint particles no longer arise, it is proposed that a volume flow of water circulating in the booth flow from the circuit of water circulating in the booth through a branch pipe to a preconcentration stage, that the preconcentration stage comprise a ring circuit with an ultrafiltration unit for continuously producing a preconcentrate in the ring circuit and a permeate which leaves the ring circuit, that the permeate flow into the circuit of water circulating in the booth and the preconcentrate into a final concentration stage, that the final concentration stage comprise a ring circuit with an ultrafiltration unit which increases the concentration of the preconcentrate in batches to the final concentrate and produces a permeate which flows into the circuit of water circulating in the booth.