Patents by Inventor Un-Young Chung

Un-Young Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7922544
    Abstract: Disclosed is a pogo pin including: a hollow body having a spring structure by spirally cutting at least a portion of an outer surface thereof; and a conductive material filling at least an inside of the body. According to the present invention, when testing a semiconductor package, error rate in contact between the package, the pogo pin and a test board can be remarkably reduced, and simultaneously can enhance rigidity and electrical conductivity of the pogo pin. Further, simple componentry of the pogo pin can facilitate its fabrication, reduce fabrication costs, and even foresee fabrication of a micro-pogo pin.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: April 12, 2011
    Inventor: Un-Young Chung
  • Publication number: 20100221960
    Abstract: Disclosed is a pogo pin including: a hollow body having a spring structure by spirally cutting at least a portion of an outer surface thereof; and a conductive material filling at least an inside of the body. According to the present invention, when testing a semiconductor package, error rate in contact between the package, the pogo pin and a test board can be remarkably reduced, and simultaneously can enhance rigidity and electrical conductivity of the pogo pin. Further, simple componentry of the pogo pin can facilitate its fabrication, reduce fabrication costs, and even foresee fabrication of a micro-pogo pin.
    Type: Application
    Filed: August 8, 2007
    Publication date: September 2, 2010
    Inventor: Un-Young Chung
  • Publication number: 20030075788
    Abstract: The present invention relates to a stacked semiconductor package and a fabricating method thereof, wherein patterned conductor portions having a wiring function for changing the wiring of leads for controlling operations of stacked semiconductor chips are printed on surfaces of the semiconductor chips. According to the present invention, when the semiconductor chips are stacked one above another, the fabrication processes are simplified by eliminating use of a printed circuit board (PCB) with wiring formed therein for connecting the leads of the semiconductor chips to each other. Further, the connection between the leads can be made in various manners by using an electrically conductive ink or adhesive, so that the stacked semiconductor package can be easily fabricated.
    Type: Application
    Filed: June 21, 2002
    Publication date: April 24, 2003
    Inventor: Un-Young Chung
  • Patent number: 6448803
    Abstract: A test socket structure in which a contact pin of a defective socket is replaced by block unit, and a pattern of a printed circuit board of a testing equipment is not abraded during testing of a semiconductor device. A fabricating method of a contact pin is disclosed by which the contact pin is hardly deformed and its spring elastic force can be maintained for a long time.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: September 10, 2002
    Inventor: Un-Young Chung