Patents by Inventor URI VALLACH

URI VALLACH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10637397
    Abstract: Method and apparatus for determining a clock frequency for an electronic processor are provided. One embodiment provides a clock generator for determining a clock frequency for an electronic processor and providing a clock signal to the electronic processor. The clock generator includes a crystal oscillator producing a reference signal and a phase locked loop receiving the reference signal and configured to generate the clock signal based on the reference signal. The clock generator also includes a tuning logic controller electrically coupled to the phase locked loop. The tuning logic controller is configured to program the phase locked loop to a first frequency and determine an integrated circuit process corner of the electronic processor. The tuning logic controller is also configured to determine a second frequency based on the integrated circuit process corner and program the phase locked loop to the second frequency.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: April 28, 2020
    Assignee: MOTOROLA SOLUTIONS, INC.
    Inventors: Mark Rozental, Claudine Tordjman, Richard S. Young, Uri Vallach
  • Publication number: 20190052226
    Abstract: Method and apparatus for determining a clock frequency for an electronic processor are provided. One embodiment provides a clock generator for determining a clock frequency for an electronic processor and providing a clock signal to the electronic processor. The clock generator includes a crystal oscillator producing a reference signal and a phase locked loop receiving the reference signal and configured to generate the clock signal based on the reference signal. The clock generator also includes a tuning logic controller electrically coupled to the phase locked loop. The tuning logic controller is configured to program the phase locked loop to a first frequency and determine an integrated circuit process corner of the electronic processor. The tuning logic controller is also configured to determine a second frequency based on the integrated circuit process corner and program the phase locked loop to the second frequency.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 14, 2019
    Inventors: Mark Rozental, Claudine Tordjman, Richard S. Young, Uri Vallach
  • Patent number: 8995512
    Abstract: Receivers (500) and methods of adaptively adjusting the receivers based on a received interferer are described. The peak-to-average ratio of a received signal is used to determine the type of interferer. The ratio and interferer type, in addition to the type of on-channel signal, are used to select parameters to adjust the decay time of a peak detector (516), and the threshold and hysteresis of a comparator (518). The peak detector (516) and comparator (518) are used to generate an off-channel flag that indicates the presence of a relatively strong interferer to other modules in the receiver (500). If valid data is not present a default set of parameters is provided. The ratio is determined by dividing the maximum peak over the average or a range of ratios is determined by comparing a scaled value of the average to different scaled values of the peak.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: March 31, 2015
    Assignee: Motorola Solutions, Inc.
    Inventors: Moshe Ben Ayun, Ricardo Franco, Ovadia Grossman, Mark Rozental, Uri Vallach
  • Publication number: 20130315344
    Abstract: A linear RF transmitter (100) includes a forward path including a baseband signal combiner (109) and an RF (radio frequency) power amplifier (123), and a linearizing control loop from an output (127) of the RF power amplifier to an input of the combiner (109). A feedback control path (105, 107) of the loop delivers a baseband error control signal to the combiner. The transmitter further includes a test signal generator (102) to apply to the combiner in a closed loop level training mode a test signal comprising a voltage Vin which increases with time in a non-linear manner approaching an asymptotic limit such that in response an output signal produced by the combiner is a voltage Ve which is substantially constant over a period of time.
    Type: Application
    Filed: September 21, 2010
    Publication date: November 28, 2013
    Applicant: MOTOROLA, INC.
    Inventors: MOSHE BEN-AYUN, OVADIA GROSSMAN, MARK ROZENTAL, URI VALLACH
  • Patent number: 8588333
    Abstract: A linear RF transmitter (100) includes a forward path including a baseband signal combiner (109) and an RF (radio frequency) power amplifier (123), and a linearizing control loop from an output (127) of the RF power amplifier to an input of the combiner (109). A feedback control path (105, 107) of the loop delivers a baseband error control signal to the combiner. The transmitter further includes a test signal generator (102) to apply to the combiner in a closed loop level training mode a test signal comprising a voltage Vin which increases with time in a non-linear manner approaching an asymptotic limit such that in response an output signal produced by the combiner is a voltage Ve which is substantially constant over a period of time.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: November 19, 2013
    Assignee: Motorola Solutions, Inc.
    Inventors: Moshe Ben-Ayun, Ovadia Grossman, Mark Rozental, Uri Vallach
  • Publication number: 20130177060
    Abstract: Receivers (500) and methods of adaptively adjusting the receivers based on a received interferer are described. The peak-to-average ratio of a received signal is used to determine the type of interferer. The ratio and interferer type, in addition to the type of on-channel signal, are used to select parameters to adjust the decay time of a peak detector (516), and the threshold and hysteresis of a comparator (518). The peak detector (516) and comparator (518) are used to generate an off-channel flag that indicates the presence of a relatively strong interferer to other modules in the receiver (500). If valid data is not present a default set of parameters is provided. The ratio is determined by dividing the maximum peak over the average or a range of ratios is determined by comparing a scaled value of the average to different scaled values of the peak.
    Type: Application
    Filed: September 2, 2011
    Publication date: July 11, 2013
    Applicant: MOTOROLA SOLUTIONS, INC.
    Inventors: Moshe Ben Ayun, Ricardo Franco, Ovadia Grossman, Mark Rozental, Uri Vallach
  • Publication number: 20110007841
    Abstract: A linear RF transmitter (100) includes a forward path including a baseband signal combiner (109) and an RF (radio frequency) power amplifier (123), and a linearizing control loop from an output (127) of the RF power amplifier to an input of the combiner (109). A feedback control path (105, 107) of the loop delivers a baseband error control signal to the combiner. The transmitter further includes a test signal generator (102) to apply to the combiner in a closed loop level training mode a test signal comprising a voltage Vin which increases with time in a non-linear manner approaching an asymptotic limit such that in response an output signal produced by the combiner is a voltage Ve which is substantially constant over a period of time.
    Type: Application
    Filed: September 21, 2010
    Publication date: January 13, 2011
    Applicant: MOTOROLA, INC.
    Inventors: MOSHE BEN-AYUN, OVADIA GROSSMAN, MARK ROZENTAL, URI VALLACH