Patents by Inventor Urs Fawer

Urs Fawer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110091677
    Abstract: The data sheet comprises a plate (2) which is or can be personalized on at least one side. The plate (2) can be bound into the ID with a strip-shaped flexible connecting element (3). By means of a connection (5), the connecting element (3) is firmly connected to one edge (4) of the plate (2). The strip-shaped connecting element (3) has at least one weakened material portion (6) which makes it more difficult to detach the plate (2) from the connecting element (3) without damage. The weakened material portion (6) is, for example, an incision or a score in the connecting element (3). The invention increases the security against forgery of IDs which have such a data sheet (1).
    Type: Application
    Filed: October 5, 2010
    Publication date: April 21, 2011
    Applicant: TRUB AG
    Inventors: Stefan Egli, Urs Fawer
  • Patent number: 7761644
    Abstract: A multiprocessor system, more particularly for terminal devices of mobile radiotelephony, in which system are arranged on a common chip: at least two processors, at least one rewritable memory which can be accessed by the two processors, at least one cache memory via which the first processor has access to the memory, at least one bridge via which the second processor has access to the memory.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: July 20, 2010
    Assignee: ST-Ericsson SA
    Inventors: Axel Hertwig, Harald Bauer, Urs Fawer, Paul Lippens
  • Patent number: 6708253
    Abstract: A processor memory system which includes: a processor component provided with a processor and at least a first integrated RAM memory, at least one second, external memory which is coupled to the processor component via an interface, a programmable memory management component which is integrated in the processor component and checks, in the case of a data address requested by the processor, whether this data address is stored in the first RAM memory which serves as a fast memory and in which data from the external memory has been loaded in advance, wherein the memory management component indicates the RAM memory address at which the data associated with the memory address is stored if the data is present in the RAM memory, the data then being read from the RAM memory, and wherein, if the data address is not present in the RAM memory, the memory management component outputs an interrupt instruction to the processor which subsequently initiates the loading of the searched data address from the external memo
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: March 16, 2004
    Assignee: Koninklijke Philips Electronics N.V
    Inventors: Axel Hertwig, Harald Bauer, Urs Fawer
  • Patent number: 6594731
    Abstract: A method of operating a storage system comprising a main memory and a cache memory structured in address-related lines, in which cache memory can be loaded with data from the main memory and be read out by a processor as required. During the processor's access to data of a certain address in the cache memory, at which address certain data from the main memory which has a corresponding address is stored, a test is made to determine whether sequential data s stored at the next address in the cache memory; and this sequential data, if unavailable, can be loaded from the main memory in the cache memory via a prefetch, the latter only taking place when the processor accesses a predefined line section lying in a line.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: July 15, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Axel Hertwig, Harald Bauer, Urs Fawer, Paul Lippens
  • Publication number: 20020049888
    Abstract: A processor memory system which includes:
    Type: Application
    Filed: August 14, 2001
    Publication date: April 25, 2002
    Inventors: Axel Hertwig, Harald Bauer, Urs Fawer