Patents by Inventor Vaibhav Garg

Vaibhav Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Diagnostic monitoring for analog-to-digital converters
    Patent number: 9509325
    Abstract: The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a digital output within a fault tolerance range. The channel selector includes a reception channel, a diagnostic channel, and an impedance compensator. The reception channel receives an analog signal for delivery to the sampling circuit when it is selected for coupling with the sampling circuit. The diagnostic channel receives a diagnostic signal for verifying the digital output of the sampling circuit when it is selected for coupling with the sampling circuit. The impedance compensator is configured to offset a high channel impedance of the reception channel based on the fault tolerance range of the sampling circuit and when the diagnostic channel is selected.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: November 29, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy Paul Duryea, Vaibhav Garg
  • DIAGNOSTIC MONITORING FOR ANALOG-TO-DIGITAL CONVERTERS
    Publication number: 20160329904
    Abstract: The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a digital output within a fault tolerance range. The channel selector includes a reception channel, a diagnostic channel, and an impedance compensator. The reception channel receives an analog signal for delivery to the sampling circuit when it is selected for coupling with the sampling circuit. The diagnostic channel receives a diagnostic signal for verifying the digital output of the sampling circuit when it is selected for coupling with the sampling circuit. The impedance compensator is configured to offset a high channel impedance of the reception channel based on the fault tolerance range of the sampling circuit and when the diagnostic channel is selected.
    Type: Application
    Filed: May 7, 2015
    Publication date: November 10, 2016
    Inventors: Timothy Paul Duryea, Vaibhav Garg