Patents by Inventor Vaibhav Vaidya

Vaibhav Vaidya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11411491
    Abstract: Voltage dividing circuitry is provided for use in a voltage converter for converting at least one input Direct Current, DC voltage to a plurality of output DC voltages. The voltage dividing circuitry including a voltage input port to receive an input DC voltage and an inductor having an input-side switch node and an output-side switch node. The output side switch node is connectable to one of a plurality of voltage output ports to supply a converted value of the input DC voltage as an output DC voltage. The flying capacitor interface has a plurality of switching elements and at least one flying capacitor, the flying capacitor interface to divide the input DC voltage to provide a predetermined fixed ratio of the input DC voltage at the input-side switch node of the inductor. A voltage converter and a power management integrated circuit having the voltage dividing circuitry are also provided.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: August 9, 2022
    Assignee: Intel Corporation
    Inventors: Vivek De, Krishnan Ravichandran, Harish Krishnamurthy, Khondker Ahmed, Sriram Vangal, Vaibhav Vaidya, Turbo Majumder, Christopher Schaef, Suhwan Kim, Xiaosen Liu, Nachiket Desai
  • Patent number: 10958163
    Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Lilly Huang, Christopher Schaef, Vaibhav Vaidya, Suhwan Kim
  • Patent number: 10958079
    Abstract: In one embodiment, an energy harvesting system includes multiple-input-multiple-output switched-capacitor (MIMOSC) circuitry comprising a plurality of switched-capacitor circuit units to receive a plurality of direct current (DC) input voltages at respective input terminals of the switched-capacitor circuit unit, combine the received DC input voltages, and provide the combined DC input voltages at an output terminal of the switched-capacitor circuit unit. The energy harvesting system also includes maximum power point tracking (MPPT) circuitry coupled to switches of the switched-capacitor circuit units of the MIMOSC circuitry. The MPPT circuitry is to provide a plurality of switching signals to the switches of the switched-capacitor circuit units. The MIMOSC circuitry is to provide a plurality of DC output voltages to respective loads based on the switching signals from the MPPT circuitry.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Xiaosen Liu, Khondker Z. Ahmed, Vivek K. De, Nachiket V. Desai, Suhwan Kim, Harish K. Krishnamurthy, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav A. Vaidya, Sriram R. Vangal
  • Patent number: 10942556
    Abstract: Systems, apparatuses and methods may provide for early pre-charge with respect to peak power events. Application performance may improve by pre-charging a supercap just prior to initiating a system wake up from a qualified system wake-source trigger. Additionally, the pre-charging of the supercap may be controlled by a time defined pre-charge period and may also be controlled by a predetermined threshold voltage.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Dileep J. Kurian, Ankit Gupta, Akhila M, Tanay Karnik, Vaibhav Vaidya, David Arditti Ilitzky, Christopher Schaef, Sriram Kabisthalam Muthukumar, Harish K. Krishnamurthy, Suhwan Kim
  • Patent number: 10938327
    Abstract: An embodiment of a harvester apparatus comprising two or more charge pump stages may include at least a first charge pump stage to receive an alternating current source, and a second charge pump stage coupled to the first charge pump stage.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Suhwan Kim, Vaibhav Vaidya, Christopher Schaef
  • Patent number: 10897364
    Abstract: Spin Hall Effect (SHE) magneto junction memory cells (e.g., magnetic tunneling junction (MTJ) or spin valve based memory cells) are used to implement high entropy physically unclonable function (PUF) arrays utilizing stochastics interactions of both parameter variations of the SHE-MTJ structures as well as random thermal noises. An apparatus is provided which comprises: an array of PUF devices, wherein an individual device of the array comprises a magnetic junction and an interconnect, wherein the interconnect comprises a spin orbit coupling material; a circuitry to sense values stored in the array, and to provide an output; and a comparator to compare the output with a code.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: January 19, 2021
    Assignee: Intel Corporation
    Inventors: Vivek De, Krishnan Ravichandran, Harish Krishnamurthy, Khondker Ahmed, Sriram Vangal, Vaibhav Vaidya, Turbo Majumder, Christopher Schaef, Suhwan Kim, Xiaosen Liu, Nachiket Desai
  • Publication number: 20200350817
    Abstract: Voltage dividing circuitry is provided for use in a voltage converter for converting at least one input Direct Current, DC voltage to a plurality of output DC voltages. The voltage dividing circuitry including a voltage input port to receive an input DC voltage and an inductor having an input-side switch node and an output-side switch node. The output side switch node is connectable to one of a plurality of voltage output ports to supply a converted value of the input DC voltage as an output DC voltage. The flying capacitor interface has a plurality of switching elements and at least one flying capacitor, to divide the input DC voltage to provide a predetermined fixed ratio of the input DC voltage at the input-side switch node of the inductor. A voltage converter and a power management integrated circuit having the voltage dividing circuitry are also provided.
    Type: Application
    Filed: September 29, 2017
    Publication date: November 5, 2020
    Inventors: Vivek DE, Krishnan RAVICHANDRAN, Harish KRISHNAMURTHY, Khondker AHMED, Sriram VANGAL, Vaibhav VAIDYA, Turbo MAJUMDER, Christopher SCHAEF, Suhwan KIM, Xiaosen LIU, Nachiket DESAI
  • Patent number: 10720831
    Abstract: In some examples, an apparatus for reference voltage generation includes a plurality of reference voltage rails each with a corresponding reference voltage, a first controller, and a second controller. The first controller is to cycle through the plurality of reference voltage rails and maintain the reference voltages in a synchronous mode. The second controller is to detect an event and provide an indication to the first controller to update in an asynchronous mode one of the plurality of reference voltages in response to the event. The first controller is to update in an asynchronous mode the one of the plurality of reference voltages in response to the event.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Christopher Schaef, Vaibhav Vaidya, Suhwan Kim
  • Publication number: 20200220457
    Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Inventors: Lilly Huang, Christopher Schaef, Vaibhav Vaidya, Suhwan Kim
  • Patent number: 10630078
    Abstract: Some embodiments include apparatus and methods for using a switch to couple an inductor to an energy harvester for a time interval to allow charging of the inductor during the time interval, and using a circuit to generate control information for power management. A value of the control information is based on a value of the time interval.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: April 21, 2020
    Assignee: Intel Corporation
    Inventors: Sally Safwat Amin, Vaibhav Vaidya, Harish K. Krishnamurthy
  • Patent number: 10615685
    Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Lilly Huang, Christopher Schaef, Vaibhav Vaidya, Suhwan Kim
  • Patent number: 10530254
    Abstract: Embodiments described herein concern operating a peak-delivered-power (PDP) controller. Operating a PDP includes calculating the new power output value from the output voltage value and the output current value, determining whether the new power output value is greater than the previous power output value to determine whether the voltage regulator is outputting a maximum power output, based on a determination that the new power output value is greater than the previous power output value, providing an instruction to a duty generator to increase a duty cycle of the voltage regulator, based on a determination that the new power output value is not greater than the previous power output value, providing an instruction to the duty generator to decrease the duty cycle of the voltage regulator, and replacing the previous power output value with the new power output value.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: January 7, 2020
    Assignee: INTEL CORPORATION
    Inventors: Khondker Ahmed, Vivek De, Nachiket Desai, Suhwan Kim, Harish Krishnamurthy, Xiaosen Liu, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav Vaidya, Sriram Vangal
  • Patent number: 10491003
    Abstract: A power regulator includes a plurality of harvester switches, each coupled to receive a separate energy source, a plurality of load switches, each coupled to supply power to a separate load, an inductor to store energy received from one or more energy sources and release the energy to supply the power to one or more loads and a controller to control charging of the inductor via activation of one or more of the harvester switches and discharging of the inductor via activation of one or more of the load switches.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: November 26, 2019
    Assignee: INTEL CORPORATION
    Inventors: Sally Amin, Sergio Carlo, Harish Krishnamurthy, Christopher Schaef, Vaibhav Vaidya
  • Patent number: 10379592
    Abstract: The present disclosure provides for the management of power of a NZE IoT device. Managing power can include receiving the one or more asynchronous events from the asynchronous event system, determining if any of the one or more asynchronous events meet a respective charge qualification, generating the power-on command for the power-managed compute system if any of the one or more asynchronous events meet the respective charge qualification, and waiting for a power source to reach a threshold associated with the respective charge qualification if any of the one or more asynchronous events do not meet the respective charge qualification.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: August 13, 2019
    Assignee: INTEL CORPORATION
    Inventors: Dileep Kurian, Tanay Karnik, David Arditti Ilitzky, Ankit Gupta, Sriram Kabisthalam Muthukumar, Vaibhav Vaidya, Suhwan Kim, Christopher Schaef, Ilya Klochkov
  • Publication number: 20190199206
    Abstract: In some examples, an apparatus for reference voltage generation includes a plurality of reference voltage rails each with a corresponding reference voltage, a first controller, and a second controller. The first controller is to cycle through the plurality of reference voltage rails and maintain the reference voltages in a synchronous mode. The second controller is to detect an event and provide an indication to the first controller to update in an asynchronous mode one of the plurality of reference voltages in response to the event. The first controller is to update in an asynchronous mode the one of the plurality of reference voltages in response to the event.
    Type: Application
    Filed: December 27, 2017
    Publication date: June 27, 2019
    Applicant: INTEL CORPORATION
    Inventors: Christopher Schaef, Vaibhav Vaidya, Suhwan Kim
  • Publication number: 20190190725
    Abstract: An apparatus is provided which comprises: an array of physically unclonable function (PUF) devices, wherein an individual device of the array comprises a magnetic junction and an interconnect, wherein the interconnect comprises a spin orbit coupling material; a circuitry to sense values stored in the array, and to provide an output; and a comparator to compare the output with a code.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Applicant: Intel Corporation
    Inventors: Vivek De, Krishnan Ravichandran, Harish Krishnamurthy, Khondker Ahmed, Sriram Vangal, Vaibhav Vaidya, Turbo Majumder, Christopher Schaef, Suhwan Kim, Xiaosen Liu, Nachiket Desai
  • Patent number: 10320197
    Abstract: In an embodiment, a system includes controller circuitry to initiate a plurality of energy transfer cycles. Each energy transfer cycle includes an input time period during which corresponding input energy is received by a power train, and an output time period during which corresponding output energy is output from the power train. The system also includes energy detection logic to provide, upon completion of each energy transfer cycle, a corresponding indication of corresponding residual energy retained by the power train. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: June 11, 2019
    Assignee: Intel Corporation
    Inventors: Vaibhav Vaidya, Lilly Huang, Christopher Schaef
  • Patent number: 10298117
    Abstract: Embodiments described herein describe operating a master-slave controller. Operating the master-slave controller comprises, based on a determination that the first output voltage value is greater than the second output voltage value, calculating a first duty cycle value and an input voltage value and the second voltage regulator, calculating a second duty cycle value based on the first duty cycle value, and based on a determination that the second output voltage value is greater than or equal to the first output voltage value, calculating the second duty cycle value based on the second output voltage value and the input voltage value and calculating the first duty cycle value based on the second duty cycle value and configuring the first voltage regulator with the first duty cycle value and the second voltage regulator with the second duty cycle value.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 21, 2019
    Assignee: INTEL CORPORATION
    Inventors: Harish Krishnamurthy, Khondker Ahmed, Vivek De, Nachiket Desai, Suhwan Kim, Xiaosen Liu, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav Vaidya, Sriram Vangal
  • Publication number: 20190103824
    Abstract: An embodiment of a harvester apparatus comprising two or more charge pump stages may include at least a first charge pump stage to receive an alternating current source, and a second charge pump stage coupled to the first charge pump stage.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Suhwan Kim, Vaibhav Vaidya, Christopher Schaef
  • Publication number: 20190094931
    Abstract: Various embodiments of the invention may analyze previous patterns of harvested energy to predict future patterns of available harvested energy. This prediction may then be used to choose from among multiple methods of energy reduction techniques. The energy reduction techniques may include multiple versions of reducing or modifying instruction execution. Reduced instruction execution may include reducing the precision of various calculations.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Applicant: INTEL CORPORATION
    Inventors: Khondker Z. Ahmed, Vivek K. De, Nachiket V. Desai, Suhwan Kim, Harish K. Krishnamurthy, Xiaosen Liu, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav Vaidya, Sriram R. Vangal