Abstract: A multi-layer structure, typically semiconductor device, is etched according to a process of the present invention, and meets the above-described existing needs by focusing on the post-etch treatment of the damaged, etched semiconductor device formed thereby. This post-etch treatment is accomplished by exposing the damaged silicon to a forming-gas downstream plasma which results in substantially increased oxide regrowth and significantly higher level of gate oxide quality. In conducting the process of the subject invention from about 1% up to about 15% by volume of H.sub.2, and from about 85 up to about 99% by volume of N.sub.2 are preferably employed as the post etching forming-gas plasma.

Abstract: Tapered via holes (10) of uniform diameter are formed in a dual-layer (SiO.sub.2 /SiNi) dielectric (18, 20) used for isolation of metallization layers in an integrated circuit. The method includes forming a photoresist layer (22) atop the nitride layer (20) and patterning the photoresist to define a via hole (24). The nitride and oxide layers are successively plasma etched through the photoresist-defined via holes (24) to form via holes (26, 28) through the dual-layer dielectric to an underlying metal line (16, 17). Etching of the nitride layer is selective to the oxide layer. Etching of the oxide layer is selective to the metal line. The photoresist and nitride layers are etched simultaneously in the presence of oxygen so as to taper the via hole in the nitride. The oxide is etched in the absence of oxygen, producing a tapered sidewall profile (32) extending continuously to the metal.