Patents by Inventor Valery Fouron

Valery Fouron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Synthesis of clock gated circuit
    Patent number: 9003339
    Abstract: Technology for synthesizing a behavioral description of a circuit into a structural description of the circuit is disclosed. The behavioral description may describe the circuit in terms of the circuit's behavior, or other functionality, via multiple statements, including a conditional statement. The technology includes analyzing statements upstream and/or downstream from the conditional statement, identifying one or more statements having dependency relationships with the conditional statement and inferring one or more potential clock domains for logic associated with the identified statements.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: April 7, 2015
    Assignee: Cadence Design Systems, Inc.
    Inventors: Mark Jensen, Andrew Goodrich, Valery Fouron
  • DESIGN SYNTHESIS OF CLOCK GATED CIRCUIT
    Publication number: 20140258948
    Abstract: Technology for synthesizing a behavioral description of a circuit into a structural description of the circuit is disclosed. The behavioral description may describe the circuit in terms of the circuit's behavior, or other functionality, via multiple statements, including a conditional statement. The technology includes analyzing statements upstream and/or downstream from the conditional statement, identifying one or more statements having dependency relationships with the conditional statement and inferring one or more potential clock domains for logic associated with the identified statements.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 11, 2014
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Mark Jensen, Andrew Goodrich, Valery Fouron