Patents by Inventor Valter Karavanic

Valter Karavanic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230396220
    Abstract: Multi-mode power amplifier systems are described. In certain embodiments, a multi-mode power amplifier system includes a power amplifier having at least a first mode and a second mode. An output matching network is coupled to an output of the power amplifier with a first section. The output matching network having a second section that includes at least an inductor, a capacitor, and a switch. The switch configured to include the capacitor in an output matching impedance for the power amplifier in the first mode and to not include the capacitor in the output matching impedance for the power amplifier in the second mode.
    Type: Application
    Filed: May 9, 2023
    Publication date: December 7, 2023
    Inventors: Neal J. Tuffy, Valter Karavanic, Martin John O’Flaherty, Michael John Ball, Alasdair Bruce
  • Publication number: 20230370027
    Abstract: Multi-mode power amplifier systems are described. In certain embodiments, a multi-mode power amplifier system shares a power amplifier chain for different communication modes. A power amplifier amplifies a radio frequency signal in at least a first mode and a second mode. An output matching network is coupled to an output of the power amplifier, and a bias circuit provides a reference current with a first reference current level to the power amplifier in the first mode and a second reference current level to the power amplifier in the second mode, the multi-mode power amplifier system configured to adjust a power amplifier signal path for the second mode relative to the first mode.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 16, 2023
    Inventors: Neal J. Tuffy, Valter Karavanic, Martin John O’Flaherty, Michael John Ball, Alasdair Bruce
  • Publication number: 20230370026
    Abstract: Multi-mode power amplifier systems are described. In certain embodiments, a multi-mode power amplifier system shares a power amplifier chain for different communication modes, where the power amplifier chain has a split output matching network with a first power amplifier transistor and a second power amplifier transistor. A bias circuit biases the power amplifier such that the first power amplifier transistor and the second power amplifier transistor are on in a first mode, and the first power amplifier transistor is on and the second power amplifier transistor is off in a second mode.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 16, 2023
    Inventors: Neal J. Tuffy, Valter Karavanic, Martin John O’Flaherty, Michael John Ball, Alasdair Bruce
  • Patent number: 9356330
    Abstract: An RF coupler implementable as an integrated circuit includes a first transmission line having a first line portion and a second line portion. A first end of the first transmission line is coupled to an input port for receiving an RF input signal. A second end of the first transmission line is coupled to an output port for providing an RF output signal. The RF coupler further includes a second transmission line formed between the first line portion and the second line portion such that magnetic field produced due to the RF input signal in the first line portion and the second line portion envelops the second transmission line. A first end of the second transmission line is configured as a coupled port for providing a coupled RF signal, and a second end of the second transmission line is coupled to a termination element to form an isolation port.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: May 31, 2016
    Assignee: ANADIGICS, INC.
    Inventors: Daniel Donoghue, Eric Gray, Abid Hussain, Duncan Little, Valter Karavanic
  • Patent number: 8680885
    Abstract: A low leakage logic circuit. The low leakage logic circuit includes a control circuit for logic circuit. The control circuit has a first transistor, a second transistor, a third transistor, a first diode, a first resistor and a second resistor. When the control circuit is ON, a first circuit path in the logic circuit is supplied with a first voltage from the source terminal of the third transistor. This voltage acts as a logic output and has the ability to source current at output terminal of the logic circuit. When the control circuit is OFF, a second circuit path in the logic circuit is supplied with a second voltage from the control circuit which is lower than the turn-on voltage of the second circuit path. This voltage is insufficient to turn ON the logic circuit, hence no current flows into the logic circuit.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: March 25, 2014
    Assignee: Anadigics, Inc.
    Inventors: Valter Karavanic, Gary Hau
  • Patent number: 7151411
    Abstract: An embodiment of the present invention provides an amplifier system, comprising at least one variable impedance matching network, the output of which provides the input to at least one amplifier stage or provides an output of the power amplifier itself, and a bias network associated with the at least one amplifier stage. The amplifier system may further comprise a controller enabling impedance control to the at least one variable impedance matching network and a supply voltage provided to the at least one variable impedance network and/or the at least one amplifier stage and wherein the at least one variable impedance network and the at least one amplifier stage may be a plurality of impedance networks connected to a plurality of amplifier stages. The at least one variable impedance network may include at least one variable capacitor and the at least one variable capacitor may be a voltage tunable dielectric capacitor which may include Parascan® voltage tunable dielectric material.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: December 19, 2006
    Assignee: Paratek Microwave, Inc.
    Inventors: James Martin, Izzac Khayo, Rich Keenan, Valter Karavanic, Greg Mendolia
  • Publication number: 20050206457
    Abstract: An embodiment of the present invention provides an amplifier system, comprising at least one variable impedance matching network, the output of which provides the input to at least one amplifier stage or provides an output of the power amplifier itself, and a bias network associated with the at least one amplifier stage. The amplifier system may further comprise a controller enabling impedance control to the at least one variable impedance matching network and a supply voltage provided to the at least one variable impedance network and/or the at least one amplifier stage and wherein the at least one variable impedance network and the at least one amplifier stage may be a plurality of impedance networks connected to a plurality of amplifier stages. The at least one variable impedance network may include at least one variable capacitor and the at least one variable capacitor may be a voltage tunable dielectric capacitor which may include Parascan® voltage tunable dielectric material.
    Type: Application
    Filed: November 3, 2004
    Publication date: September 22, 2005
    Inventors: James Martin, Izzac Khayo, Rich Keenan, Valter Karavanic, Greg Mendolia