Patents by Inventor Van Dang

Van Dang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180163573
    Abstract: A system includes a heat recovery steam generator (HRSG) configured to generate steam from a supply of feed water using exhaust gases. The HRSG includes a heater configured to receive a supply of steam and further heat the steam. The heater includes a first manifold and a first set of branch connections circumferentially spaced about a first circumferential axis of the first manifold. Each of the branch connections routes a fluid jet of steam into a lumen of the first manifold.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 14, 2018
    Inventors: Van Dang, Denis Robert Bruno, Edward Martin Ortman, Early Femiana
  • Patent number: 9971730
    Abstract: A link layer to physical layer (PHY) serial interface is disclosed. In one aspect, a system on a chip (SoC) integrated circuit (IC) includes a link layer circuit, and a remote IC includes a Universal Serial Bus (USB) PHY circuit. A bus having four or fewer wires connects the two ICs. A link bridge communicates with the link layer circuit and serializes USB Transceiver Macrocell Interface (UTMI) signaling received from the link layer circuit as high speed (HS) USB messages for transmission to the remote IC. The link bridge also receives HS messages from the USB PHY circuit on the remote IC. The link bridge deserializes the HS messages to extract UTMI signaling and passes the extracted UTMI signaling to the link layer circuit.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: May 15, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Terrence Brian Remple, Nam Van Dang, Sassan Shahrokhinia
  • Patent number: 9889087
    Abstract: A method of improving cognition in a patient with Down syndrome, which entails intranasally administering one or more ?2-ADR agonists or pharmaceutically-acceptable salts of either or both to the patient in an amount and with a frequency effective to improve cognition of the patient as measured contextual learning tests.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: February 13, 2018
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ahmad Salehi, Brian Medina, Van Dang, Devsmita Das
  • Patent number: 9739475
    Abstract: Disclosed herein is a heat recovery steam generator system comprising a vestibule comprising a base plate, a roof and side walls; where the base plate is opposedly disposed to the roof; a heat exchanger space through which an exhaust gas stream is charged; where the vestibule is disposed atop a heat exchanger space; and where the vestibule comprises at least one header in fluid communication with a tube bundle; where a portion of the tube bundle is disposed in the heat exchanger space; and a support system for the tube bundle; where the support system comprises a strap that is reversibly attached to the base plate as well as to the roof of the vestibule or to a structural member in the vestibule; and where each tube of the tube bundle contacts a collar that rests on the base plate.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: August 22, 2017
    Assignee: GENERAL ELECTRIC TECHNOLOGY GMBH
    Inventors: Jeffrey Fred Magee, Wesley Paul Bauver, II, Van Dang, Robert William Moore
  • Publication number: 20160378166
    Abstract: An electronic device includes a receiver sense circuit configured to generate a detection signal responsive to detecting a connection to a sink device via a connector. The electronic device further includes a controller coupled to a hot plug detect (HPD) interface. The controller is configured to enable a direct current (DC) voltage source based on the detection signal received from the receiver sense circuit.
    Type: Application
    Filed: September 9, 2016
    Publication date: December 29, 2016
    Inventors: Cheng Zhong, Nam Van Dang, Hung Quoc Vuong, Xiaohua Kong
  • Publication number: 20160313876
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for combining authentication and application shortcut. An example method includes responsive to a user request identifying an entity: identifying a first time period associated with the entity based at least on a type of the entity; determining, within the first time period, a plurality of first candidate entities associated with the first entity; selecting first entities in the plurality of first candidate entities according to one or more selection criteria; and providing, for presentation to the user, first user-selectable graphical elements on a first graphical user-interactive timeline. Each first user-selectable graphical element identifies a corresponding first entity in the first entities.
    Type: Application
    Filed: April 22, 2016
    Publication date: October 27, 2016
    Inventors: Xin Dong, Christopher Tim Althoff, Kevin Patrick Murphy, Safa Alai, Van Dang, Wei Zhang
  • Publication number: 20160305650
    Abstract: Disclosed herein is a heat recovery steam generator system comprising a vestibule comprising a base plate, a roof and side walls; where the base plate is opposedly disposed to the roof; a heat exchanger space through which an exhaust gas stream is charged; where the vestibule is disposed atop a heat exchanger space; and where the vestibule comprises at least one header in fluid communication with a tube bundle; where a portion of the tube bundle is disposed in the heat exchanger space; and a support system for the tube bundle; where the support system comprises a strap that is reversibly attached to the base plate as well as to the roof of the vestibule or to a structural member in the vestibule; and where each tube of the tube bundle contacts a collar that rests on the base plate.
    Type: Application
    Filed: April 17, 2015
    Publication date: October 20, 2016
    Inventors: Jeffrey Fred MAGEE, Wesley Paul BAUVER, II, Van DANG, Robert William MOORE
  • Patent number: 9465424
    Abstract: In a particular embodiment, an electronic device includes a direct current (DC) voltage source coupled to a DC interface. The electronic device includes a receiver sense circuit configured to detect a connection of the electronic device to a sink device via a connector without consuming power from the DC voltage source. The electronic device further includes a controller coupled to a hot plug detect (HPD) interface. The controller is configured to receive a detection signal from the receiver sense circuit, selectively control a switch to enable and disable the DC voltage source based on the detection signal, detect an HPD signal at the HPD interface after enabling the DC voltage source, and disable the receiver sense circuit in response to detecting the HPD signal.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: October 11, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng Zhong, Nam Van Dang, Hung Q. Vuong, Xiaohua Kong
  • Publication number: 20160266598
    Abstract: Systems and methods for producing reference voltages are disclosed. An example bandgap reference circuit includes a core bandgap module that produces a bias control for biasing the gate of a transistor to produce a proportional to absolute temperature current. The core bandgap module may use an operational amplifier that uses auto-calibration to reduce its input offset voltage. A trimming module uses the bias control to produce a proportional to absolute temperature current that is combined with a trim current and supplied to a resistor and diode to produce a trimmed bandgap voltage. The trimmed bandgap voltage is buffered to produce a reference voltage output. The trim current may be set based on a room temperature measurement of the reference voltage output.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 15, 2016
    Inventors: Mong Chit Wong, Nam Van Dang, Rajeev Jain, Bo-Ren Wang, Sassan Shahrokhinia
  • Publication number: 20160184241
    Abstract: A method of improving cognition in a patient with Down syndrome, which entails intranasally administering one or more ?2-ADR agonists or pharmaceutically-acceptable salts of either or both to the patient in an amount and with a frequency effective to improve cognition of the patient as measured contextual learning tests.
    Type: Application
    Filed: May 26, 2015
    Publication date: June 30, 2016
    Applicant: THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY
    Inventors: Ahmad SALEHI, Brian Medina, Van Dang, Devsmita Das
  • Patent number: 9320724
    Abstract: A method of improving cognition in a patient with Down syndrome, which entails administering one or more ?2 adrenergic receptor agonists to the patient in an amount and with a frequency effective to improve cognition of the patient as measured by contextual learning tests.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: April 26, 2016
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ahmad Salehi, Brian Mediana, Sarah Moghadam, Van Dang, Devsmita Das, Kara Martin
  • Patent number: 9270287
    Abstract: A gated voltage controlled oscillator has four identically structured delay cells, each of the delay cells having the same output load by connecting to the same number of inputs of other ones of the delay cells. Optionally a four phase sampling clock selects from the delay cell output and samples, at a four phase sampler, an input signal. Optionally an edge detector synchronizes the phase of the gated voltage controlled oscillator to coincide with NRZ bits. Optionally a variable sampling rate selects different phases from the delay cells to selectively sample NRZ bits at a lower rate. Optionally, a pulse width modulation (PWM) mode synchronizes a phase of the sampling clock to sample PWM symbols and recover encoded bits.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: February 23, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Zhi Zhu, Xiaohua Kong, Nam Van Dang
  • Publication number: 20150363349
    Abstract: A link layer to physical layer (PHY) serial interface is disclosed. In one aspect, a system on a chip (SoC) integrated circuit (IC) includes a link layer circuit, and a remote IC includes a Universal Serial Bus (USB) PHY circuit. A bus having four or fewer wires connects the two ICs. A link bridge communicates with the link layer circuit and serializes USB Transceiver Macrocell Interface (UTMI) signaling received from the link layer circuit as high speed (HS) USB messages for transmission to the remote IC. The link bridge also receives HS messages from the USB PHY circuit on the remote IC. The link bridge deserializes the HS messages to extract UTMI signaling and passes the extracted UTMI signaling to the link layer circuit.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 17, 2015
    Inventors: Terrence Brian Remple, Nam Van Dang, Sassan Shahrokhinia
  • Patent number: 9176511
    Abstract: A series of current repeaters with localized feedback is provided. Each current that precedes a subsequent current repeater in the series is configured to receive a feedback current from the subsequent current repeater and generate an error signal accordingly with a differential amplifier so as to reduce current repetition errors that would otherwise result from an offset voltage in the differential amplifier.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: November 3, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Nam Van Dang, Rajeev Jain, Terrence Brian Remple, Jingcheng Zhuang, Mong Chit Wong
  • Publication number: 20150301539
    Abstract: A series of current repeaters with localized feedback is provided. Each current that precedes a subsequent current repeater in the series is configured to receive a feedback current from the subsequent current repeater and generate an error signal accordingly with a differential amplifier so as to reduce current repetition errors that would otherwise result from an offset voltage in the differential amplifier.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 22, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Nam Van Dang, Rajeev Jain, Terrence Brian Remple, Jingcheng Zhuang, Mong Chit Wong
  • Patent number: 9037437
    Abstract: System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: May 19, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Miao Li, Xiaohua Kong, Nam Van Dang, Cheng Zhong
  • Publication number: 20150008967
    Abstract: A gated voltage controlled oscillator has four identically structured delay cells, each of the delay cells having the same output load by connecting to the same number of inputs of other ones of the delay cells. Optionally a four phase sampling clock selects from the delay cell output and samples, at a four phase sampler, an input signal. Optionally an edge detector synchronizes the phase of the gated voltage controlled oscillator to coincide with NRZ bits. Optionally a variable sampling rate selects different phases from the delay cells to selectively sample NRZ bits at a lower rate. Optionally, a pulse width modulation (PWM) mode synchronizes a phase of the sampling clock to sample PWM symbols and recover encoded bits.
    Type: Application
    Filed: September 19, 2014
    Publication date: January 8, 2015
    Inventors: Zhi Zhu, Xiaohua Kong, Nam Van Dang
  • Publication number: 20140235726
    Abstract: A method of improving cognition in a patient with Down syndrome, which entails administering one or more ?2 adrenergic receptor agonists to the patient in an amount and with a frequency effective to improve cognition of the patient as measured by contextual learning tests
    Type: Application
    Filed: February 12, 2014
    Publication date: August 21, 2014
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ahmad Salehi, Brian Mediana, Sarah Moghadam, Van Dang, Devsmita Das, Kara Martin
  • Publication number: 20140149756
    Abstract: In a particular embodiment, an electronic device includes a direct current (DC) voltage source coupled to a DC interface. The electronic device includes a receiver sense circuit configured to detect a connection of the electronic device to a sink device via a connector without consuming power from the DC voltage source. The electronic device further includes a controller coupled to a hot plug detect (HPD) interface. The controller is configured to receive a detection signal from the receiver sense circuit, selectively control a switch to enable and disable the DC voltage source based on the detection signal, detect an HPD signal at the HPD interface after enabling the DC voltage source, and disable the receiver sense circuit in response to detecting the HPD signal.
    Type: Application
    Filed: January 29, 2014
    Publication date: May 29, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Cheng Zhong, Nam Van Dang, Hung Q. Vuong, Xiaohua Kong
  • Publication number: 20140101507
    Abstract: System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 10, 2014
    Inventors: Miao Li, Xiaohua Kong, Nam Van Dang, Cheng Zhong