Patents by Inventor Vanessa Smet

Vanessa Smet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220386457
    Abstract: An electronic device carrier structure can include a substrate including a plurality of electrical contacts spaced apart on the substrate, a plurality of electrically conductive balls, each of the electrically conductive balls being on a respective one of the plurality of electrical contacts, solder attaching each of the electrically conductive balls to respective ones of the electrical contacts to form an attachment boundary where the solder ends on a surface of each of the plurality of electrically conductive balls, and a polymer layer extending on the substrate onto the plurality of electrically conductive balls to form a surface of the polymer layer at a contact point on the plurality of electrically conductive balls that is above the attachment boundary and below an apex of each of the plurality of electrically conductive balls.
    Type: Application
    Filed: May 21, 2022
    Publication date: December 1, 2022
    Inventors: Omkar Gupte, Vanessa Smet, Gregorio R. Murtagian
  • Publication number: 20160111380
    Abstract: Disclosed herein are edge-coated microelectronic packages comprising a microelectronic package having a top, a bottom, and an exposed edge, and a coating comprising a polymer, wherein the microelectronic package comprises a glass substrate, and wherein the coating covers at least a portion of the top, at least a portion of the bottom, and at least a portion of the exposed edge of the microelectronic package. Also disclosed herein are methods of making and using edge-coated microelectronic packages.
    Type: Application
    Filed: October 21, 2015
    Publication date: April 21, 2016
    Applicant: GEORGIA TECH RESEARCH CORPORATION
    Inventors: Venkatesh SUNDARAM, Vanessa SMET, Rao R. TUMMALA
  • Publication number: 20140145328
    Abstract: The various embodiments of the present invention provide fine pitch, chip-to-substrate hybrid interconnect assemblies, as well as methods of making and using the assemblies. The hybrid assemblies generally include a semiconductor having a die pad disposed thereon, a substrate having a substrate pad disposed thereon, and a polymer layer disposed between the surface of the die pad and the surface of the substrate pad. In addition, at least a portion of the surface of the die pad is metallically bonded to at least a portion of the surface of the substrate pad and at least a portion of the surface of the die pad is chemically bonded to at least a portion of the surface of the substrate pad.
    Type: Application
    Filed: January 21, 2014
    Publication date: May 29, 2014
    Applicant: Georgia Tech Research Corporation
    Inventors: Rao Tummala, Venkatesh Sundaram, Markondeya Raj Pulugurtha, Tao Wang, Vanessa Smet