Patents by Inventor Venkatesh P. Ramachandra
Venkatesh P. Ramachandra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11508654Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.Type: GrantFiled: May 28, 2020Date of Patent: November 22, 2022Assignee: SanDisk Technologies LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Patent number: 11444016Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.Type: GrantFiled: May 28, 2020Date of Patent: September 13, 2022Assignee: SanDisk Technologes LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Patent number: 10847452Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.Type: GrantFiled: October 23, 2018Date of Patent: November 24, 2020Assignee: SANDISK TECHNOLOGIES LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Patent number: 10825827Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and an I/O interface. A portion of the memory die is used as a pool capacitor for the I/O interface.Type: GrantFiled: September 25, 2018Date of Patent: November 3, 2020Assignee: SANDISK TECHNOLOGIES LLCInventors: Mohan Dunga, James Kai, Venkatesh P. Ramachandra, Piyush Dak, Luisa Lin, Masaaki Higashitani
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Patent number: 10818685Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and an I/O interface. A portion of the memory die is used as a pool capacitor for the I/O interface.Type: GrantFiled: September 25, 2018Date of Patent: October 27, 2020Assignee: SANDISK TECHNOLOGIES LLCInventors: Mohan Dunga, James Kai, Venkatesh P. Ramachandra, Piyush Dak, Luisa Lin, Masaaki Higashitani
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Patent number: 10789992Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the I/O pads.Type: GrantFiled: October 23, 2018Date of Patent: September 29, 2020Assignee: SANDISK TECHNOLOGIES LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Publication number: 20200294909Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Applicant: SANDISK TECHNOLOGIES LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Publication number: 20200294910Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Applicant: SANDISK TECHNOLOGIES LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Publication number: 20200013795Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and an I/O interface. A portion of the memory die is used as a pool capacitor for the I/O interface.Type: ApplicationFiled: September 25, 2018Publication date: January 9, 2020Applicant: SANDISK TECHNOLOGIES LLCInventors: Mohan Dunga, James Kai, Venkatesh P. Ramachandra, Piyush Dak, Luisa Lin, Masaaki Higashitani
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Publication number: 20200013794Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and an I/O interface. A portion of the memory die is used as a pool capacitor for the I/O interface.Type: ApplicationFiled: September 25, 2018Publication date: January 9, 2020Applicant: SANDISK TECHNOLOGIES LLCInventors: Mohan Dunga, James Kai, Venkatesh P. Ramachandra, Piyush Dak, Luisa Lin, Masaaki Higashitani
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Publication number: 20200013434Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the I/O pads.Type: ApplicationFiled: October 23, 2018Publication date: January 9, 2020Applicant: SANDISK TECHNOLOGIES LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Publication number: 20200013714Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.Type: ApplicationFiled: October 23, 2018Publication date: January 9, 2020Applicant: SANDISK TECHNOLOGIES LLCInventors: Luisa Lin, Mohan Dunga, Venkatesh P. Ramachandra, Peter Rabkin, Masaaki Higashitani
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Patent number: 10381327Abstract: A non-volatile storage system includes a plurality of memory dies and an interface circuit. Each memory die includes a wide I/O interface electrically coupled to another wide I/O interface of another memory die of the plurality of memory dies. The interface circuit is physically separate from the memory dies. The interface circuit includes a first interface and a second interface. The first interface comprises a wide I/O interface electrically coupled to a wide I/O interface of at least one of the memory dies of the plurality of memory dies. The second interface is a narrow I/O interface configured to communicate with an external circuit.Type: GrantFiled: October 6, 2016Date of Patent: August 13, 2019Assignee: SanDisk Technologies LLCInventors: Venkatesh P. Ramachandra, Michael Mostovoy, Hem Takiar, Gokul Kumar, Vinayak Ghatawade
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Patent number: 10249592Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.Type: GrantFiled: February 18, 2018Date of Patent: April 2, 2019Assignee: SanDisk Technologies LLCInventors: Michael Mostovoy, Gokul Kumar, Ning Ye, Hem Takiar, Venkatesh P. Ramachandra, Vinayak Ghatawade, Chih-Chin Liao
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Publication number: 20180174996Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.Type: ApplicationFiled: February 18, 2018Publication date: June 21, 2018Applicant: SANDISK TECHNOLOGIES LLCInventors: Michael Mostovoy, Gokul Kumar, Ning Ye, Hem Takiar, Venkatesh P. Ramachandra, Vinayak Ghatawade, Chih-Chin Liao
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Publication number: 20180102344Abstract: A non-volatile storage system includes a plurality of memory dies and an interface circuit. Each memory die includes a wide I/O interface electrically coupled to another wide I/O interface of another memory die of the plurality of memory dies. The interface circuit is physically separate from the memory dies. The interface circuit includes a first interface and a second interface. The first interface comprises a wide I/O interface electrically coupled to a wide I/O interface of at least one of the memory dies of the plurality of memory dies. The second interface is a narrow I/O interface configured to communicate with an external circuit.Type: ApplicationFiled: October 6, 2016Publication date: April 12, 2018Applicant: SANDISK TECHNOLOGIES LLCInventors: Venkatesh P. Ramachandra, Michael Mostovoy, Hem Takiar, Gokul Kumar, Vinayak Ghatawade
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Patent number: 9899347Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.Type: GrantFiled: March 9, 2017Date of Patent: February 20, 2018Assignee: SanDisk Technologies LLCInventors: Michael Mostovoy, Gokul Kumar, Ning Ye, Hem Takiar, Venkatesh P. Ramachandra, Vinayak Ghatawade, Chih-Chin Liao