Patents by Inventor Venkatram Muddhasani

Venkatram Muddhasani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8243381
    Abstract: Various embodiments of the present invention provide systems and methods for sector address mark detection. As an example, data detection systems are disclosed that include a sector address mark detection circuit and a sector address mark quality detection circuit. The sector address mark detection circuit receives a data stream and identifies a sector address mark in the data stream. The sector address mark quality detection circuit receives a first sample and a second sample from the data stream corresponding to the sector address mark, and determines a quality of the sector address mark based at least in part on the first sample and the second sample. In various cases, one or more of the samples of the sector address mark up to all of the samples of the sector address mark may be used.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: August 14, 2012
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Venkatram Muddhasani
  • Patent number: 7813065
    Abstract: Various embodiments of the present invention provide systems and methods for performing modified rate burst demodulation. For example, a method for performing modified rate burst demodulation is disclosed. The method includes receiving a data input that includes a synchronization pattern, an information pattern, and a demodulation pattern. A periodic boundary is established along with a phase and frequency of a sampling clock based at least in part on the synchronization pattern. The information pattern is processed using the sampling clock to determine a location fix. The sampling clock is phase shifted by a skew amount and a phase shifted sampling clock is provided. The demodulation pattern is processed using the phase shifted sampling clock.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: October 12, 2010
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Venkatram Muddhasani, Xun Zhang
  • Patent number: 7768437
    Abstract: Various embodiments of the present invention provide systems and methods for utilizing a plurality of potentially mismatched analog to digital converters. For example, a method for adaptively processing a variety of input signals is disclosed. The method includes providing an adaptive loop circuit, and a first and second circuit pairs. The first circuit pair includes a first analog to digital converter and first register, and the second circuit pair includes a second analog to digital converter and a second register. An input signal is received and an event status is received. The event status initially indicates that the input signal includes data associated with a first event and subsequently indicates that the input signal includes data associated with a second event. The first circuit pair to drive the adaptive loop circuit when the first event is indicated, and the second circuit pair to drive the adaptive circuit when the second event is indicated.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: August 3, 2010
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Venkatram Muddhasani
  • Publication number: 20100118690
    Abstract: Various embodiments of the present invention provide systems and methods for sector address mark detection. As an example, data detection systems are disclosed that include a sector address mark detection circuit and a sector address mark quality detection circuit. The sector address mark detection circuit receives a data stream and identifies a sector address mark in the data stream. The sector address mark quality detection circuit receives a first sample and a second sample from the data stream corresponding to the sector address mark, and determines a quality of the sector address mark based at least in part on the first sample and the second sample. In various cases, one or more of the samples of the sector address mark up to all of the samples of the sector address mark may be used.
    Type: Application
    Filed: November 13, 2008
    Publication date: May 13, 2010
    Inventors: Viswanath Annampedu, Venkatram Muddhasani
  • Publication number: 20090267819
    Abstract: Various embodiments of the present invention provide systems and methods for utilizing a plurality of potentially mismatched analog to digital converters. For example, a method for adaptively processing a variety of input signals is disclosed. The method includes providing an adaptive loop circuit, and a first and second circuit pairs. The first circuit pair includes a first analog to digital converter and first register, and the second circuit pair includes a second analog to digital converter and a second register. An input signal is received and an event status is received. The event status initially indicates that the input signal includes data associated with a first event and subsequently indicates that the input signal includes data associated with a second event. The first circuit pair to drive the adaptive loop circuit when the first event is indicated, and the second circuit pair to drive the adaptive circuit when the second event is indicated.
    Type: Application
    Filed: April 29, 2008
    Publication date: October 29, 2009
    Inventors: Viswanath Annampedu, Venkatram Muddhasani
  • Publication number: 20090268322
    Abstract: Various embodiments of the present invention provide systems and methods for performing modified rate burst demodulation. For example, a method for performing modified rate burst demodulation is disclosed. The method includes receiving a data input that includes a synchronization pattern, an information pattern, and a demodulation pattern. A periodic boundary is established along with a phase and frequency of a sampling clock based at least in part on the synchronization pattern. The information pattern is processed using the sampling clock to determine a location fix. The sampling clock is phase shifted by a skew amount and a phase shifted sampling clock is provided. The demodulation pattern is processed using the phase shifted sampling clock.
    Type: Application
    Filed: April 29, 2008
    Publication date: October 29, 2009
    Inventors: Viswanath Annampedu, Venkatram Muddhasani, Xun Zhang