Abstract: A non-intrusive method and system for recovering the state of a computer system including a memory having first and second matched levels. The first level is connected to a target processor and the second level is connected to a checkpoint processor which is also connected to the target processor. In an example of the invention, a two phase, non-intrusive method and system for debugging parallel computer programs is provided. The program has checkpoint instructions therein. In the first phase the execution of the program is monitored non-intrusively from a bus connecting the target processor to the first level of memory. A sequence of relevant program instructions is stored in an event table. Upon encountering a checkpoint instruction, the target processor cues the checkpoint processor to initiate a non-intrusive checkpointing strategy utilizing the two-level memory with an E-bit scheme.