Patents by Inventor Vera Abrosimova

Vera Abrosimova has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8882912
    Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: November 11, 2014
    Assignee: Silicor Materials Inc.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
  • Patent number: 8847241
    Abstract: The invention is directed to a surface emitting semiconductor light-emitting diode (LED) in which a reflector layer (4) of the first conductivity type is provided between a substrate (2) and a first barrier layer (5). A first contact layer (9) has at least one emitting surface (13) via which radiation emitted by an active layer (6) exits the LED. The emitting surfaces (13) are electrically and optically isolated from one another by surface implanted regions (11) in the first contact layer (9) which are irradiated with electric charge carriers. The areas of the layers located below the emitting surface (13) starting from the first contact layer (9) and proceeding as far as at least through the active layer (6) are electrically and optically isolated with respect to areas of the layers not located below the emitting surface (13) by means of first deep implanted regions (12.1) irradiated with electric charge carriers.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: September 30, 2014
    Assignee: JENOPTIK Polymer Systems GmbH
    Inventors: Bernd Kloth, Vera Abrosimova, Torsten Trenkler
  • Publication number: 20130026447
    Abstract: The invention is directed to a surface emitting semiconductor light-emitting diode (LED) in which a reflector layer (4) of the first conductivity type is provided between a substrate (2) and a first barrier layer (5). A first contact layer (9) has at least one emitting surface (13) via which radiation emitted by an active layer (6) exits the LED. The emitting surfaces (13) are electrically and optically isolated from one another by surface implanted regions (11) in the first contact layer (9) which are irradiated with electric charge carriers. The areas of the layers located below the emitting surface (13) starting from the first contact layer (9) and proceeding as far as at least through the active layer (6) are electrically and optically isolated with respect to areas of the layers not located below the emitting surface (13) by means of first deep implanted regions (12.1) irradiated with electric charge carriers.
    Type: Application
    Filed: March 31, 2011
    Publication date: January 31, 2013
    Inventors: Bernd Kloth, Vera Abrosimova, Torsten Trenkler
  • Publication number: 20110211995
    Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 1, 2011
    Applicant: Calisolar, Inc.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
  • Patent number: 7955433
    Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: June 7, 2011
    Assignee: Calisolar, Inc.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
  • Patent number: 7887633
    Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: February 15, 2011
    Assignee: Calisolar, Inc.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Anis Jouini, Dieter Linke, Martin Kaes, Jean Patrice Rakotoniaina, Kamel Ounadjela
  • Patent number: 7651566
    Abstract: Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4 ?cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: January 26, 2010
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
  • Publication number: 20090308455
    Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 17, 2009
    Applicant: CALISOLAR, INC.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Anis Jouini, Dieter Linke, Martin Kaes, Jean Patrice Rakotoniaina, Kamel Ounadjela
  • Publication number: 20090026423
    Abstract: Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4? cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 29, 2009
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
  • Publication number: 20090028773
    Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 29, 2009
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela