Patents by Inventor Vi Lee

Vi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210212444
    Abstract: A back suspender apparatus includes a back carrier for carrying at least an object thereat and a suspension arrangement. The suspension arrangement includes a back support coupled to the back carrier, and a carrying system which includes two shoulder straps extended from the back support and two resilient straps provided at the shoulder straps respectively for absorbing a bounding force of the back carrier so as to minimize a relative movement of the back carrier with respect to each of the shoulder straps.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 15, 2021
    Applicant: Ox Distribution Group
    Inventor: Vi LEE
  • Publication number: 20190197628
    Abstract: A method of providing collateral financed premium for an insurance policy includes the steps of securing a premium loan from a lender for annual premiums of an insured borrower of an insurance policy, and securing a collateral loan from a third party for payment of interests of the annual premium loan, wherein the interest of the financed premium will be paid by the collateral loan when an earning income from a contract value of the insurance policy is less than the annual interest of the premium loan. In addition, in computation of the contract value and the total premium loan required, credit rate of the contract value for at least the first two years of the insurance policy is set as zero percent.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 27, 2019
    Inventors: Andy Castro, Vi LEE, Danny H. Tran
  • Publication number: 20020140461
    Abstract: The invention relates to methods and apparatus that advantageously provide relatively high-frequency data communication and relatively low power consumption in a low voltage differential signaling (LVDS) output buffer or driver. The LVDS output buffer includes an output resistance selected to terminate reflections from mismatched loads. Advantageously, a portion of the resistance is isolated by an emitter to base junction from a load applied to output terminals of the LVDS output buffer. A remaining portion of the resistance can thereby be reduced, advantageously allowing a reduction in power loss and reducing an amount of voltage swing at output transistors of the LVDS output buffer.
    Type: Application
    Filed: June 4, 2001
    Publication date: October 3, 2002
    Inventors: Syed K. Enam, Masoud Djafari, Vi Lee
  • Publication number: 20020141515
    Abstract: The invention relates to methods and apparatus that align serial data so as to provide corresponding parallel data. The methods and apparatus search for framing patterns in demultiplexed serial data and shift the demultiplexed serial data to provide aligned parallel data. Advantageously, embodiments of the invention can operate in real time in a relatively high-frequency optical network, such as SONET. One embodiment of the invention detects a frame pattern and provides a nibble shift output. The nibble shift output is applied to another circuit, such as a phase detector or a voltage controlled oscillator, to shift the demultiplexed serial data by a nibble, i.e., four bits. Shifts of smaller increments, i.e., one bit, two bits, or three bits, are applied to the demultiplexed data within a framing circuit to allow the framing circuit to fully align the parallel data.
    Type: Application
    Filed: June 4, 2001
    Publication date: October 3, 2002
    Inventors: Syed K. Enam, Masoud Djafari, R. Kent Smythe, Vi Lee, Michael B. Choi
  • Publication number: 20020118704
    Abstract: The invention relates to methods and apparatus that compare the frequencies of a first clock signal and a second clock signal and reliably provide an indication of whether the frequency relationship between the first clock signal and the second clock signal is within a predetermined range. In one embodiment, the first clock signal is a reference clock signal and the second clock signal is generated from a serial bitstream. The indication can be used to synchronize a voltage controlled oscillator within a phase locked loop to the reference clock signal to thereby keep the phase locked loop within a lock range of a serial bitstream from which the second clock is generated. Embodiments of the invention digitally generate a beat frequency related to a difference in speed between the first clock signal and the second clock signal. The beat frequency is synchronized, advantageously obviating the need to synchronize asynchronous counters as is conventionally done.
    Type: Application
    Filed: June 4, 2001
    Publication date: August 29, 2002
    Inventors: Syed K. Enam, Masoud Djafari, R. Kent Smythe, Michael B. Choi, Vi Lee
  • Publication number: 20020097682
    Abstract: The invention relates to methods and apparatus that provide a low frequency data loop-back in a transceiver to advantageously provide built-in test capability with low overhead. The low frequency loop-back advantageously allows testing of a receiver and a transmitter of the transceiver through a high frequency serial interface while reducing the need to interface to a low frequency interface of the transceiver with expensive and specialized test equipment. One embodiment of the low frequency data loop-back includes a transceiver configured to select between a reference clock signal for normal use of the transceiver and a clock signal generated from serial data for test use in response to an activation of a loop-back test command. In one embodiment, a multiplexer selects between the reference clock signal and the generated clock signal.
    Type: Application
    Filed: June 4, 2001
    Publication date: July 25, 2002
    Inventors: Syed K. Enam, Masoud Djafari, Duke T. Tran, R. Keuf Smythe, Michael B. Choi, Bo-Shiou Ke, Vi Lee