Abstract: An electronic device may be provided with an antenna having a resonating element formed from a segment of peripheral conductive housing structures. A speaker may be aligned with first openings in the segment. A vent may be aligned with second openings in the segment. A connector may protrude through the segment. A trace combiner for the antenna may be patterned onto the speaker and may be coupled to the segment. Tuners for the antenna may be disposed on first and second flexible printed circuits that extend along opposing sides of the connector. The tuners may be controlled through the speaker. The second flexible printed circuit may extend along the vent. The vent may have a vent cowling with a cut-out region next to the tuner on the second flexible printed circuit.

Abstract: Systems and methods for enhanced detection of fraudulent electronic transactions are disclosed. In one embodiment, a system uses the ongoing stream of transactions to construct and maintain a dynamically evolving merchant relationship graph. When a proposed transaction is submitted to the system, the system computes a predicted likelihood that the given account would make a transaction with these characteristics with the given merchant. The graph is used to compute transitive relatedness between merchants which may be indirectly associated with one another, as well as to compute aggregate relatedness, when there are multiple avenues of relationship between two merchants.

Abstract: Systems and methods for enhanced detection of fraudulent electronic transactions are disclosed. In one embodiment, a system uses the ongoing stream of transactions to construct and maintain a dynamically evolving merchant relationship graph. When a proposed transaction is submitted to the system, the system computes a predicted likelihood that the given account would make a transaction with these characteristics with the given merchant. The graph is used to compute transitive relatedness between merchants which may be indirectly associated with one another, as well as to compute aggregate relatedness, when there are multiple avenues of relationship between two merchants.

Abstract: A method and apparatus for testing DRAM is described. The method and apparatus causes the DRAM pins to be reconfigured to provide a direct path between the memory core and the DRAM pins. This reconfiguration allows the memory core to be “seen” without probing and also allows faster and simpler testing with a more traditional protocol. The method and apparatus for testing also provides for several options to further increase testing speed. These options include an internal block compare and a core noise option. The internal block compare performs an internal parallel bit by bit comparison of read data to the contents of a write buffer and generates an error signal if a mismatch occurs. The core noise option simulates the noise that can occur during the normal mode of operation that does not occur during testing.