Abstract: Methods and apparatus to provide virtualized vector processing are described. In one embodiment, one or more operations corresponding to a virtual vector request are distributed to one or more processor cores for execution.

Abstract: Some embodiments of the invention provide a computer based method of editing video, allowing users to add multimedia objects such as sound effect, text, stickers, animation, and template to a specific point in a timeline of the video. In some embodiments, the timeline of the video is represented by a simple scroll bar with a control play button, which allows a user to drag the control play button to a specific point on the timeline. This enables a user to pinpoint a specific frame within a video to edit. In some embodiments, a multimedia panel allows a user to select specific multimedia objects to add to the frame, with further manipulation. A mechanism to store these multimedia objects associated with the selected frame is defined in this invention. In some embodiments, frames with multimedia objects added will have indicators shown on the scroll bar, allowing the user to fast forward to that frame and further edit the frame.

Abstract: Given the need to save time in are everyday existence, the “Fabric Lock” two piece interlocking system, allows the user the advantage of time saving, by continually finding and holding proper placement of bedding/fabrics/materials, allowing for quick placement and adjustments of same. This is accomplished with relative ease, and without special tooling or devices to complete fabric locking.

Abstract: An example provides an apparatus to receive an audio input signal, generate, from the audio input signal, a filtered audio input signal to suppress at least one modal frequency of a flat loudspeaker diaphragm, and output the filtered audio input signal to at least one actuator to cause a vibration of the flat loudspeaker diaphragm.

Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digi

Abstract: Methods and apparatuses relating to a vector instruction with a register operand with an elemental offset are described. In one embodiment, a hardware processor includes a decode unit to decode a vector instruction with a register operand with an elemental offset to access a first number of elements in a register specified by the register operand, wherein the first number is a total number of elements in the register minus the elemental offset, access a second number of elements in a next logical register, wherein the second number is the elemental offset, and combine the first number of elements and the second number of elements as a data vector, and an execution unit to execute the vector instruction on the data vector.

Abstract: Methods and apparatuses relating to a prefetch instruction to prefetch a multidimensional block of elements from a multidimensional array into a cache. In one embodiment, a hardware processor includes a decoder to decode a prefetch instruction to prefetch a multidimensional block of elements from a multidimensional array into a cache, wherein at least one operand of the prefetch instruction is to indicate a system memory address of an element of the multidimensional block of elements, a stride of the multidimensional block of elements, and boundaries of the multidimensional block of elements, and an execution unit to execute the prefetch instruction to generate system memory addresses of the other elements of the multidimensional block of elements, and load the multidimensional block of elements into the cache from the system memory addresses.

Abstract: An electronic mail (email) message is received at in email transport infrastructure and has a traffic type identifier identifying a traffic type. Function processing logic in the email transport infrastructure conditionally processes the email message based on the traffic type.

Abstract: An electronic device may be provided with wireless circuitry. The wireless circuitry may include one or more antennas. An antenna may have an antenna feed that is coupled to a radio-frequency transceiver with a transmission line. An impedance matching circuit may be coupled to the antenna feed to match the impedance of the transmission line and the antenna. The impedance matching circuit and tunable circuitry in the antenna may be formed using integrated circuits. Each integrated circuit may include switching circuitry that is used in switching components such as inductors and capacitors into use. Sensors such as temperature sensors, current and voltage sensors, power sensors, and impedance sensors may be integrated into the integrated circuits. Each integrated circuit may store settings for the switching circuitry and may include communications and control circuitry for communicating with external circuits and processing sensor data.

Abstract: An example electronic device includes: an audio and video (AV) processor, a computer subsystem, a control mechanism, and a media playing device. The AV processor includes an AV input port to receive external AV signals from an external media source. The computer subsystem is to provide internal AV signals to the AV processor. The control mechanism is to control the AV processor to select between the external AV signals and the internal AV signals, and enable the AV processor to transmit selected AV signals to the media playing device. The media playing device is to play the selected AV signals.

Abstract: An electronic device may be provided with wireless circuitry. An application processor may generate wireless data that is to be transmitted using the wireless circuitry and may process wireless data that has been received using the wireless circuitry. The wireless circuitry may include multiple baseband processors, multiple associated radios, and front-end module and antenna circuitry. Sensors may be used to provide the application processor with sensor data. During operation, the application processor and the baseband processors may be used to transmit and receive wireless communications traffic. A multiradio controller integrated circuit that does not transmit or receive the wireless communications traffic may be used in controlling the wireless circuitry based on impedance measurements, sensor data, and other information.

Abstract: A system can include a digital oversampler configured to oversample an input data stream; a rate generator configured to select a frequency that is not less than an expected frequency of the input data stream; a rate generator clock of the rate generator configured to output a clock signal that has the selected frequency; a sample receiver configured to receive at least one sample of the input data stream from the digital oversampler; a sample counter configured to be incremented by each received sample responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler; a sample rate converter configured to accumulate samples from the sample receiver at the rate of a “toothless” clock signal, wherein the sample counter is configured to be decremented by the “toothless” clock signal at the selected frequency responsive to a determination that the sample receiver has not received at least one sample of the input data stream from the digi

Abstract: Methods and apparatus to provide virtualized vector processing are disclosed. In one embodiment, a processor includes a decode unit to decode a first instruction into a decoded first instruction and a second instruction into a decoded second instruction, and an execution unit to: execute the decoded first instruction to cause allocation of a first portion of one or more operations corresponding to a virtual vector request to a first processor core, and generation of a first signal corresponding to a second portion of the one or more operations to cause allocation of the second portion to a second processor core, and execute the decoded second instruction to cause a first computational result corresponding to the first portion of the one or more operations and a second computational result corresponding to the second portion of the one or more operations to be aggregated and stored to a memory location.

Abstract: A method can include a digital oversampler oversampling an input data stream, a rate generator selecting a frequency that is not less than an expected frequency of the input data stream, a rate generator clock of the rate generator outputting a clock signal that has the selected frequency, determining whether a sample receiver has received at least one sample of the input data stream from the digital oversampler, and, responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler, incrementing a sample counter by each received sample. The method can also include a sample rate converter accumulating samples from the sample receiver at the rate of a “toothless” clock signal, determining whether an output of the sample counter is greater than zero, and, responsive to a determination that the output of the sample counter is greater than zero, an AND gate passing the “toothless” clock signal to the sample rate converter.

Abstract: A device for protecting one or more credit or charge cards from radio frequency scanning is disclosed. The device comprises a rectangular-shaped planar element sized for fitting within the banknote slot of a personal carrying accessory, wherein the planar element is composed of a top layer of plastic material having an interior surface including printed information, a middle layer of a metallic foil that inhibits the transmission of radio frequency signals, and a bottom layer of plastic material having an interior surface including printed information, wherein the top layer and the bottom layer of plastic material completely cover a surface area of both sides of the middle layer, and wherein the device has a thickness of about 0.3 mm and exhibits a bending stiffness substantially equal to paper.

Abstract: The present disclosure relates to stent graft devices for endovascular repair of aneurysms. A stent graft device according to the present disclosure comprises: a membrane defining a lumen between a proximal end and a distal end of the membrane, the lumen for fluid communication distally therethrough; a plurality of fenestrations disposed on the membrane and fluidly communicable with the lumen; and a plurality of protrusions carried by the membrane, each protrusion extending inwardly into or outwardly from the lumen. Fluid communicated from the plurality of fenestrations is deflectable or deflected by the plurality of protrusions.

Abstract: An electronic device may be provided with wireless circuitry. The wireless circuitry may include one or more antennas. An antenna may have an antenna feed that is coupled to a radio-frequency transceiver with a transmission line. An impedance matching circuit may be coupled to the antenna feed to match the impedance of the transmission line and the antenna. The impedance matching circuit and tunable circuitry in the antenna may be formed using integrated circuits. Each integrated circuit may include switching circuitry that is used in switching components such as inductors and capacitors into use. Sensors such as temperature sensors, current and voltage sensors, power sensors, and impedance sensors may be integrated into the integrated circuits. Each integrated circuit may store settings for the switching circuitry and may include communications and control circuitry for communicating with external circuits and processing sensor data.

Abstract: A method can include a digital oversampler oversampling an input data stream, a rate generator selecting a frequency that is not less than an expected frequency of the input data stream, a rate generator clock of the rate generator outputting a clock signal that has the selected frequency, determining whether a sample receiver has received at least one sample of the input data stream from the digital oversampler, and, responsive to a determination that the sample receiver has received at least one sample of the input data stream from the digital oversampler, incrementing a sample counter by each received sample. The method can also include a sample rate converter accumulating samples from the sample receiver at the rate of a “toothless” clock signal, determining whether an output of the sample counter is greater than zero, and, responsive to a determination that the output of the sample counter is greater than zero, an AND gate passing the “toothless” clock signal to the sample rate converter.

Abstract: An electronic device may be provided with wireless circuitry. The wireless circuitry may include one or more antennas. An antenna may have an antenna feed that is coupled to a radio-frequency transceiver with a transmission line. An impedance matching circuit may be coupled to the antenna feed to match the impedance of the transmission line and the antenna. The impedance matching circuit and tunable circuitry in the antenna may be formed using integrated circuits. Each integrated circuit may include switching circuitry that is used in switching components such as inductors and capacitors into use. Sensors such as temperature sensors, current and voltage sensors, power sensors, and impedance sensors may be integrated into the integrated circuits. Each integrated circuit may store settings for the switching circuitry and may include communications and control circuitry for communicating with external circuits and processing sensor data.

Abstract: An example provides an apparatus to receive an audio input signal, generate, from the audio input signal, a filtered audio input signal to suppress at least one modal frequency of a flat loudspeaker diaphragm, and output the filtered audio input signal to at least one actuator to cause a vibration of the flat loudspeaker diaphragm.