Patents by Inventor Vignesh Trichy Ravi
Vignesh Trichy Ravi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11799738Abstract: A system, method, and apparatus may provide one or more tangible, nontransitory computer-readable storage media having stored thereon executable instructions to instruct a processor to: stripe an outgoing network message into two or more pieces; send a first piece to a receiver via a first network interface card (NIC), and a second piece to the receiver via a second NIC; and upon determining that the receiver failed to receive a piece of the outgoing network message, replay the piece that the receiver failed to receive via a third NIC.Type: GrantFiled: January 7, 2022Date of Patent: October 24, 2023Assignee: Intel CorporationInventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
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Patent number: 11736402Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: GrantFiled: October 13, 2021Date of Patent: August 22, 2023Assignee: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20220141138Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: ApplicationFiled: October 13, 2021Publication date: May 5, 2022Applicant: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20220131768Abstract: A system, method, and apparatus may provide one or more tangible, nontransitory computer-readable storage media having stored thereon executable instructions to instruct a processor to: stripe an outgoing network message into two or more pieces; send a first piece to a receiver via a first network interface card (NIC), and a second piece to the receiver via a second NIC; and upon determining that the receiver failed to receive a piece of the outgoing network message, replay the piece that the receiver failed to receive via a third NIC.Type: ApplicationFiled: January 7, 2022Publication date: April 28, 2022Applicant: Intel CorporationInventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
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Patent number: 11277350Abstract: Particular embodiments described herein provide for a system for enabling the communication of a large message using multiple network interface controllers (NICs). The system can be configured to determine that a message to communicate to a receiver over a network is above a threshold, determine a plurality of NICs to be used to communicate the message, create a manifest that includes an identifier of each of the plurality of NICs, and communicate the manifest to the receiver using a multi-unit message. In an example, the multi-unit message is communicated using a PUT command and the receiver can analyze the manifest and use a GET command to pull the message from the plurality of NICs.Type: GrantFiled: January 9, 2018Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Ravi Murty, Keith D. Underwood, Ravindra Babu Ganapathi, Andrew Friedley, Vignesh Trichy Ravi
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Patent number: 11153211Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: GrantFiled: December 9, 2017Date of Patent: October 19, 2021Assignee: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20190182161Abstract: There is included in one example a switch, including: an ingress port to receive data from a source host; a first egress port to send data to a destination host; a second egress port to send data to the source host; and a congestion notification generator (CNG) including: a congestion detector to compute bandwidth consumption of a flow associated with a packet received on the ingress port and assigned to the first egress port, and determine based on the computed bandwidth consumption that the flow is congested; a flow extractor to extract a flow identifier of the flow from the packet; a throttle calculator to calculate a quantitative flow throttle value for the flow; and a header builder to build a congestion notification packet to instruct the source host to throttle the flow.Type: ApplicationFiled: December 9, 2017Publication date: June 13, 2019Applicant: Intel CorporationInventors: Vignesh Trichy Ravi, Ravi Murty, Ravindra Babu Ganapathi, Michael A. Parker
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Publication number: 20190044827Abstract: Particular embodiments described herein provide for a system for enabling the communication of a message using a network interface controller (NICs) on a subnet. In an example, the system is applicable to hardware offload NICs such as those implementing the Portals protocol. The system can be configured to determine a NIC in a first subnet to be used to communicate a message, where the NIC is configured to comply with a message passing interface protocol, create a manifest that includes an identifier of the NICs and a subnet ID that identifies the first subnet, and communicate the manifest to the receiver.Type: ApplicationFiled: March 30, 2018Publication date: February 7, 2019Applicant: INTEL CORPORATOINInventors: Ravindra Babu Ganapathi, Andrew Friedley, Ravi Murty, Vignesh Trichy Ravi
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Publication number: 20190044875Abstract: Particular embodiments described herein provide for a system for enabling the communication of a large message using multiple network interface controllers (NICs). The system can be configured to determine that a message to communicate to a receiver over a network is above a threshold, determine a plurality of NICs to be used to communicate the message, create a manifest that includes an identifier of each of the plurality of NICs, and communicate the manifest to the receiver using a multi-unit message. In an example, the multi-unit message is communicated using a PUT command and the receiver can analyze the manifest and use a GET command to pull the message from the plurality of NICs.Type: ApplicationFiled: January 9, 2018Publication date: February 7, 2019Applicant: Intel CorporationInventors: Ravi Murty, Keith D. Underwood, Ravindra Babu Ganapathi, Andrew Friedley, Vignesh Trichy Ravi
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Patent number: 10025361Abstract: A method includes controlling active frequency states of a plurality of heterogeneous processing units based on frequency sensitivity metrics indicating performance coupling between different types of processing units in the plurality of heterogeneous processing units. A processor includes a plurality of heterogeneous processing units and a performance controller to control active frequency states of the plurality of heterogeneous processing units based on frequency sensitivity metrics indicating performance coupling between different types of processing units in the plurality of heterogeneous processing units. The active frequency state of a first type of processing unit in the plurality of heterogeneous processing units is controlled based on a first activity metric associated with a first type of processing unit and a second activity metric associated with a second type of processing unit.Type: GrantFiled: June 5, 2014Date of Patent: July 17, 2018Assignee: Advanced Micro Devices, Inc.Inventors: Indrani Paul, Vignesh Trichy Ravi, Manish Arora, Srilatha Manne
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Patent number: 9261938Abstract: An apparatus and methods for controlling energy consumption of an electronic device determine an availability of an energy source to provide energy to the electronic device. The apparatus and methods control, by power management control logic of the electronic device, energy consumption of the electronic device in response to determining the availability of the energy source.Type: GrantFiled: July 17, 2014Date of Patent: February 16, 2016Assignee: Advanced Micro Devices, Inc.Inventors: Manish Arora, Vignesh Trichy Ravi, Indrani Paul
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Publication number: 20160018870Abstract: An apparatus and methods for controlling energy consumption of an electronic device determine an availability of an energy source to provide energy to the electronic device. The apparatus and methods control, by power management control logic of the electronic device, energy consumption of the electronic device in response to determining the availability of the energy source.Type: ApplicationFiled: July 17, 2014Publication date: January 21, 2016Inventors: Manish Arora, Vignesh Trichy Ravi, Indrani Paul
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Publication number: 20150355692Abstract: A method includes controlling active frequency states of a plurality of heterogeneous processing units based on frequency sensitivity metrics indicating performance coupling between different types of processing units in the plurality of heterogeneous processing units. A processor includes a plurality of heterogeneous processing units and a performance controller to control active frequency states of the plurality of heterogeneous processing units based on frequency sensitivity metrics indicating performance coupling between different types of processing units in the plurality of heterogeneous processing units. The active frequency state of a first type of processing unit in the plurality of heterogeneous processing units is controlled based on a first activity metric associated with a first type of processing unit and a second activity metric associated with a second type of processing unit.Type: ApplicationFiled: June 5, 2014Publication date: December 10, 2015Inventors: Indrani Paul, Vignesh Trichy Ravi, Manish Arora, Srilatha Manne
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Publication number: 20150067356Abstract: A data processing system includes a plurality of processor resources, a manager, and a power distributor. Each of the plurality of data processor cores is operable at a selected one of a plurality of performance states. The manager assigns each of a plurality of program elements to one of the plurality of processor resources, and synchronizing the program elements using barriers. The power distributor is coupled to the manager and to the plurality of processor resources, and assigns a performance state to each of the plurality of processor resources within an overall power budget, and in response to detecting that a program element assigned to a first processor resource is at a barrier, increases the performance state of a second processor resource that is not at the barrier within the overall power budget.Type: ApplicationFiled: August 30, 2013Publication date: March 5, 2015Applicant: Advanced Micro Devices, Inc.Inventors: Vignesh Trichy Ravi, Manish Arora, William Brantley, Srilatha Manne, Indrani Paul, Michael Schulte