Abstract: A system includes a resource controller that can determine if a memory has been idle for longer than a threshold. The resource controller is at the system level, above the memory subsystem. In response to determining the memory has been idle for at least the threshold, the resource controller can trigger the memory controller to send a shallow self-refresh command, which is self-refresh without clock stop.

Abstract: Embodiments herein relate to a chiplet or other die which includes multiple sense points within the die and components for digitizing and outputting sensed voltages of the sense points. In one approach, an analog-to-digital converter (ADC) is coupled to each sense point, and a multiplexer is coupled to the outputs of the ADCs. A select signal for the multiplexer can be received from an external control unit which selects one of the sense points based on information such as a current workflow of the die. The selected sense point can change as the workflow changes. The optimal sense point can be determined by comparing the voltage of each sense point and selecting the sense point with the lowest voltage. The sensed voltage is provided to a voltage regulator as a feedback signal to optimize control of the power supply of the die.

Abstract: In an embodiment, a processor may include a plurality of processing engines and a sequencing circuit. The sequencing circuit may be to: detect a completed execution of a first workload by a first processing engine; in response to a detection of the completed execution of the first workload by the first processing engine, identify at least one processing engine specified as consecutive to the first processing engine in a sequence mapping; and activate the at least one processing engine specified as consecutive to execute a second workload.

Abstract: Systems, apparatuses and methods may provide for operating system (OS) technology that determines an average bandwidth consumption with respect to a memory device, wherein the average bandwidth consumption is dedicated to a previous execution of a thread in a multi-threaded execution environment, stores the average bandwidth consumption, and sends the average bandwidth consumption to a power management unit in response to a subsequent execution of the thread being scheduled. Additionally, logic hardware technology may include a first set of registers to accumulate an average bandwidth consumption for a plurality of threads on a per thread basis with respect to the memory device, wherein the average bandwidth consumption corresponds to previous executions of the plurality of threads. The logic hardware technology determines a minimum bandwidth demand based on the average bandwidth consumption and sets a dynamic voltage and frequency scaling point based on the minimum bandwidth demand.

Abstract: Various embodiments provide apparatuses, systems, and methods for bandwidth-based control of phase count in a voltage regulator. The techniques described herein may be used with a voltage regulator that supply power to a data circuit that processes data traffic. The voltage regulator includes a plurality of phases to generate an output voltage that is provided to the data circuit. A control circuit determines a bandwidth of the data traffic that is handled by the data circuit and control a number of the phases that are active based on the determined bandwidth. Other embodiments may be described and claimed.

Abstract: Hardware and/or software that dynamically enables or disables CRC and/or adjust voltage level of power supply to a physical layer block on a host by determining an optimum tradeoff between power and performance. The hardware and/or software decreases the voltage level for the power supply and enables CRC to compensate signal errors (e.g., errors from signal integrity issues). Hardware and/or software dynamically adjusts voltage level of the power supply rail based on the throughput or speed of the DDR link. In some examples, depending on read or write operations, the voltage level of the power supply rail is adjusted.

Abstract: A scheme for measuring AC and DC load-line (LL) using voltage and current monitoring apparatus. During calibration for LL measurement, a tested or known workload is executed on a processor or system-on-chip (SoC). The calibration can be done when the processor is first used in a real-time system (customer) scenario, or repeated whenever necessary to compensate silicon aging or other effects that affect the LL values. LL is estimated, determined, and/or calculated for each power supply rail in the processor or SoC. The measured LL is used in calculations that determine the operating voltage of an input voltage regulator (VR) at run time, thereby optimizing the power/performance characteristics of that specific system.

Abstract: In an example, a method of correcting an error in a memory device includes determining a temperature profile associated with a region of a memory device. The temperature profile is one of a plurality of temperature profiles each associated with a respective region of a plurality of regions of the memory device. The method includes determining a correction capability based on the thermal profile. The method also includes correcting an error in the memory region using the determined correction capability.

Abstract: Systems and methods to manage a memory device by executing program code to determine a temperature profile associated with a region of the memory device. The temperature profile may be one of many temperature profiles each associated with a respective region of the memory device. A correction capability may be determined based on the thermal profile and an error in the memory region may be corrected using the determined correction capability.

Abstract: In an example, a method of correcting an error in a memory device includes determining a temperature profile associated with a region of a memory device. The temperature profile is one of a plurality of temperature profiles each associated with a respective region of a plurality of regions of the memory device. The method includes determining a correction capability based on the thermal profile. The method also includes correcting an error in the memory region using the determined correction capability.

Abstract: Systems and methods to manage a memory device by executing program code to determine a temperature profile associated with a region of the memory device. The temperature profile may be one of many temperature profiles each associated with a respective region of the memory device. A correction capability may be determined based on the thermal profile and an error in the memory region may be corrected using the determined correction capability.

Abstract: An approach is provided in which a cooling manager retrieves pre-characterization data corresponding to a fan that electronic components included in a computer system. The pre-characterization data includes operational zones based upon fan power measurements and fan speed settings. The cooling manager sets the fan to a first speed setting within a first operational zone, and detects that one of the components generates a temperature change value that exceeds a specified temperature change value corresponding to the component. In turn, the cooling manager selects a second operational zone and sets the fan to a second speed setting within the second operational zone.

Abstract: An approach is provided in which a cooling manager retrieves pre-characterization data corresponding to a fan that electronic components included in a computer system. The pre-characterization data includes operational zones based upon fan power measurements and fan speed settings. The cooling manager sets the fan to a first speed setting within a first operational zone, and detects that one of the components generates a temperature change value that exceeds a specified temperature change value corresponding to the component. In turn, the cooling manager selects a second operational zone and sets the fan to a second speed setting within the second operational zone.

Abstract: An approach is provided in which a cooling manager retrieves pre-characterization data corresponding to a fan that electronic components included in a computer system. The pre-characterization data includes operational zones based upon fan power measurements and fan speed settings. The cooling manager sets the fan to a first speed setting within a first operational zone, and detects that one of the components generates a temperature change value that exceeds a specified temperature change value corresponding to the component. In turn, the cooling manager selects a second operational zone and sets the fan to a second speed setting within the second operational zone.

Abstract: An approach is provided in which a cooling manager retrieves pre-characterization data corresponding to a fan that electronic components included in a computer system. The pre-characterization data includes operational zones based upon fan power measurements and fan speed settings. The cooling manager sets the fan to a first speed setting within a first operational zone, and detects that one of the components generates a temperature change value that exceeds a specified temperature change value corresponding to the component. In turn, the cooling manager selects a second operational zone and sets the fan to a second speed setting within the second operational zone.